STP5NK80Z STMICROELECTRONICS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 15

Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuit
  • 4 Package mechanical data
  • 5 Packaging mechanical data

N-channel 800V - 1.9Ω - 4.3A - TO-220/TO-220FP Zener-protected SuperMESH™ Power MOSFET General features ■ 100% avalanche tested ■ Gate charge minimized ■ Very low intrinsic capacitances ■ Very good manufacturing repeatibility

Description

The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip-based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products.

Applications

■ Switching application Internal schematic diagram Type VDSS (@Tjmax) RDS(on) ID STP5NK80Z 800 V < 2.4 Ω 4.3 A STP5NK80ZFP 800 V < 2.4 Ω 4.3 A TO-220FPTO-220 Order codes Part number Marking Package Packaging STP5NK80Z P5NK80Z TO-220 Tube STP5NK80ZFP P5NK80ZFP TO-220FP Tube

1 Electrical ratings

Table 1. Absolute maximum ratings

  1. Limited only by maximu m temperature allowed
  2. Pulse width limited by safe operating area
  3. I SD ≤ 4.3A, di/dt ≤200A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.

Table 2. Thermal data

1.1 Protection features of gate-to-source zener diodes

integrity. These integrated Zener diodes thus avoid the usage of external components. Table 3. Avalanche characteristics Table 4. Gate-source zener diode

2 Electrical characteristics

Table 5. On/off states Table 6. Dynamic

  1. Pulsed: pulse duration=300µs, duty cycle 1.5%
  2. C oss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS

Table 7. Source drain diode

  1. Pulse width limited by safe operating area
  2. Pulsed: pulse duration=300µs, duty cycle 1.5%

2.1 Electrical characterist ics (curves)

Figure 1. Safe operating area for TO-220 Figure 2. Thermal impedance for TO-220 Figure 3. Safe operating area for TO-220FP Figure 4. Thermal impedance for TO-220FP Figure 5. Output characterisics Figure 6. Transfer characteristics

3 Test circuit

Figure 16. Unclamped Inductive load test Figure 17. Unclamped Inductive waveform Figure 18. Switching times test circuit for Figure 19. Gate charge test circuit Figure 20. Test circuit for inductive load

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com

A B D E H G F 123F2 L4L5 DIM. mm. inch A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 TO-220FP MECHANICAL DATA

DIM. mm. inch A 4.40 4.60 0.173 0.181 b 0.61 0.88 0.024 0.034 b1 1.15 1.70 0.045 0.066 c 0.49 0.70 0.019 0.027 D 15.25 15.75 0.60 0.620 E 10 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 F 1.23 1.32 0.048 0.052 H1 6.20 6.60 0.244 0.256 J1 2.40 2.72 0.094 0.107 L 13 14 0.511 0.551 L1 3.50 3.93 0.137 0.154 L20 16.40 0.645 L30 28.90 1.137 øP 3.75 3.85 0.147 0.151 Q 2.65 2.95 0.104 0.116 TO-220 MECHANICAL DATA

5 Revision history

Table 8. Revision history