STP4NC60 STMICROELECTRONICS | Alldatasheet

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Technical content

N-CHANNEL 600V - 1.8Ω - 4.2A TO-220/TO-220FP/I2PAK PowerMesh™II MOSFET (*)Limited only by maximum Temperature allowed ■ TYPICAL R DS (on) = 1.8Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED ■ NEW HIGH VOLTAGE BENCHMARK ■ GATE CHARGE MINIMIZED

DESCRIPTION

The PowerMESH ™ II is the evolution of the first generation of MESH OVERLAY™. The layout re- finements introduced greatly improve the Ron*area figure of merit while keeping the device at the lead- ing edge for what concerns swithing speed, gate charge and ruggedness.

APPLICATIONS

■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVERS ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area (1)ISD ≤4.2A, di/dt≤300A/µs, VDD ≤ V(BR)DSS ,Tj≤ TJMAX. TYPE V DSS R DS(on) ID STP4NC60 STP4NC60FP STB4NC60-1 600V 600V 600V <2 . 2Ω <2 . 2Ω <2 . 2Ω 4.2A 4.2A 4.2A Symbol Parameter Value Unit STP(B)4NC60(-1) STP4NC60FP V DS Drain-source Voltage (VGS =0 ) 600 V VDGR Drain-gate Voltage (RGS =2 0kΩ ) 600 V V GS Gate- source Voltage ±30 V ID Drain Current (continuos) at TC = 25°C 4.2 4.2(*) A ID Drain Current (continuos) at TC = 100°C 2.6 2.6(*) A IDM (/circle6 ) Drain Current (pulsed) 16.8 16.8(*) A PTOT Total Dissipation at TC = 25°C 100 35 W Derating Factor 0.8 0.28 W/°C dv/dt(1) Peak Diode Recovery voltage slope 3.5 3.5 V/ns VISO Insulation Withstand Voltage (DC) - 2500 V Tstg Storage Temperature – 6 5t o1 5 0 ° C Tj Max. Operating Junction Temperature INTERNAL SCHEMATIC DIAGRAM TO-220 TO-220FP 1 2 3 I2PAK (Tabless TO-220)

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF ON (1) DYNAMIC TO-220/I2PAK TO-220FP Rthj-case Thermal Resistance Junction-case Max 1.25 3.57 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tjmax) 4.2 A EAS Single Pulse Avalanche Energy (starting Tj= 25 °C, ID =IAR ,VDD =5 0V ) 250 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 600 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) VDS = Max Rating 1µ A VDS = Max Rating, TC = 125 °C 50 µA IGSS Gate-body Leakage Current (VDS =0 ) VGS = ±30V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS =V GS ,ID = 250µA 234V R DS(on) Static Drain-source On Resistance VGS =1 0 V ,ID =1.5 A 1.8 2.2 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs(1) Forward Transconductance V DS >ID(on)xR DS(on)max, ID =2 A 3.7 S C iss Input Capacitance VDS =2 5 V ,f=1M H z ,VGS =0 475 pF C oss Output Capacitance 72 pF C rss Reverse Transfer Capacitance 10 pF

ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time VDD =3 0 0 V ,ID =2 A R G = 4.7Ω VGS =1 0 V (see test circuit, Figure 3) 14 ns tr Rise Time 14 ns Q g Total Gate Charge VDD =4 8 0 V ,ID = 4A, VGS =1 0 V 16.5 23.1 nC Q gs Gate-Source Charge 2.5 nC Q gd Gate-Drain Charge 9 nC Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) Off-voltage Rise Time VDD = 480V, ID =4 A , R G =4 . 7Ω, VGS = 10V (see test circuit, Figure 5) 15 ns tf Fall Time 19 ns tc Cross-over Time 24 ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD Source-drain Current 4.2 A ISDM (2) Source-drain Current (pulsed) 16.8 A VSD (1) Forward On Voltage ISD = 4.2A, VGS =0 1.6 V trr Reverse Recovery Time ISD = 4A, di/dt = 100A/µs, VDD =1 0 0 V ,Tj=1 5 0 ° C (see test circuit, Figure 5) 600 ns Q rr Reverse Recovery Charge 2.7 µC IRRM Reverse Recovery Current 9 A Safe Operating Area for TO-220FPSafe Operating Area for TO-220 / I2PAK

Static Drain-source On ResistanceTransconductance Thermal Impedance for To-220 / I²PAK Output Characteristics Thermal Impedance for TO-220FP Transfer Characteristics

Source-drain Diode Forward Characteristics Capacitance VariationsGate Charge vs Gate-source Voltage Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature

Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4:Gate Charge test Circuit Fig. 2:Unclamped Inductive WaveformFig. 1:Unclamped Inductive Load Test Circuit Fig. 3:Switching Times Test Circuits For Resistive Load

DIM. mm inch A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 D1 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 A C D E F G Dia. TO-220 MECHANICAL DATA P011C

A B D E H G F 123F2 L4L5 DIM. mm. inch A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.5 0.045 0.067 F2 1.15 1.5 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 TO-220FP MECHANICAL DATA

DIM. mm inch A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 e 2.4 2.7 0.094 0.106 E 10 10.4 0.393 0.409 L 13.1 13.6 0.515 0.531 L1 3.48 3.78 0.137 0.149 L2 1.27 1.4 0.050 0.055 L B D E A CA1 e P011P5/E TO-262 (I2PAK) MECHANICAL DATA

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