STP4NB30

STP4NB30FP STMICROELECTRONICS | Alldatasheet

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Technical content

N-CHANNEL 300V - 1.8Ω - 4A - TO-220/TO-220FP PowerMesh™ MOSFET (1)ISD ≤4 A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS , Tj ≤ TJMAX (*) Limited only by Maximum Temperature Allowed ■ TYPICAL R DS (on) = 1.8 Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED ■ NEW HIGH VOLTAGE BENCHMARK ■ GATE CHARGE MINIMIZED

DESCRIPTION

Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an ad- vanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprieraty edge termi- nation structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteris- tics.

APPLICATIONS

■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR TELECOM, INDUSTRIAL AND CONSUMER ENVIRONMENT ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE V DSS R DS(on) ID STP4NB30 STP4NB30FP 300 V 300 V < 2 Ω < 2 Ω 4 A 4 A Symbol Parameter Value Unit STP4NB30 STP4NB30FP VDS Drain-source Voltage (VGS = 0) 300 V VDGR Drain-gate Voltage (RGS = 20 kΩ ) 300 V VGS Gate- source Voltage ±30 V ID Drain Current (continuos) at TC = 25°C 4 4 (*) A ID Drain Current (continuos) at TC = 100°C 2.5 2.5 (*) A IDM (1) Drain Current (pulsed) 16 16 (*) A PTOT Total Dissipation at TC = 25°C 70 30 W Derating Factor 0.56 0.24 W/°C dv/dt Peak Diode Recovery voltage slope 4 V/ns VISO Insulation Withstand Voltage (DC) - 2000 V Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature 150 °C TO-220 TO-220FP INTERNAL SCHEMATIC DIAGRAM

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF ON (1) DYNAMIC TO-220 TO-220FP Rthj-case Thermal Resistance Junction-case Max 1.785 4.17 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR , VDD = 50 V) 150 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 300 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1µ A VDS = Max Rating, TC = 125 °C 50 µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ±30V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS = VGS , ID = 250µA 234V R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 2.5 A 1.8 2 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (1) Forward Transconductance V DS > ID(on) x RDS(on)max, ID = 2.5 A 2.1 S C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 260 pF C oss Output Capacitance 56 pF C rss Reverse Transfer Capacitance 7p F

ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time VDD = 150V, ID = 2.5 A R G =4 . 7Ω VGS = 10V (see test circuit, Figure 3) 9n s tr Rise Time 9 ns Q g Total Gate Charge VDD = 240V, ID = 5 A, VGS = 10V 12 16 nC Q gs Gate-Source Charge 7.5 nC Q gd Gate-Drain Charge 3 nC Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) Off-voltage Rise Time VDD = 240V, ID = 5 A, R G = 4.7Ω, VGS = 10V (see test circuit, Figure 5) 10 ns tf Fall Time 7 ns tc Cross-over Time 15 ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD Source-drain Current 4 A ISDM (2) Source-drain Current (pulsed) 16 A VSD (1) Forward On Voltage ISD = 4 A, VGS = 0 1.5 V trr Reverse Recovery Time ISD = 5 A, di/dt = 100A/µs, VDD = 100V, Tj = 150°C (see test circuit, Figure 5) 180 ns Q rr Reverse Recovery Charge 800 nC IRRM Reverse Recovery Current 9 A Safe Operating Area for TO-220FPSafe Operating Area for TO-220

Thermal Impedance for TO-220 Thermal Impedance for TO-220FP Tranfer CharacteristicsOutput Characteristics Tranconductance Static Drain-Source On Resistance

Capacitance VariationsGate Charge vs Gate-source Voltage Source-drain Diode Forward Characteristics Normalized On Resistance vs TemperatureNormalized Gate Thereshold Voltage vs Temp.

Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4: Gate Charge test Circuit Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuit For Resistive Load

DIM. mm inch A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 D1 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 A C D E F G Dia. TO-220 MECHANICAL DATA P011C

A B D E H G F 123F2 L4L5 DIM. mm. inch A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 TO-220FP MECHANICAL DATA

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