N-channel 100V - 0.028 - 40A TO-220 low gate charge STripFET™ Power MOSFET

Document overview

  • Manufacturer or author: STMICROELECTRONICS
  • PDF pages: 12

Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuit
  • 4 Package mechanical data
  • 5 Revision history

N-channel 100V - 0.028Ω - 40A TO-220 Low gate charge STripFET™ Power MOSFET General features ■ Exceptional dv/dt capability ■ 100% avalanche tested ■ Application oriented characterization

Description

This Power MOSFET series realized with STMicroelectronics unique STripFET process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high- efficiency isolated DC-DC converters for Telecom and Computer application. It is also intended for any application with low gate charge drive requirements.

Applications

■ Switching application Internal schematic diagram Type V DSS RDS(on) ID STP40NF10L 100V <0.033 Ω 40A TO-220 Order codes Part number Marking Package Packaging STP40NF10L P40NF10L TO-220 Tube

1 Electrical ratings

Table 1. Absolute maximum ratings

  1. Pulse width limited by safe operating area
  2. Starting T j= 25°C, ID = 20A, VDD=40V

Table 2. Thermal data

2 Electrical characteristics

Table 3. On/off states Table 4. Dynamic

  1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5.

Table 5. Switching times

Table 6. Source drain diode

  1. Pulse width limited by safe operating area.
  2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%

2.1 Electrical characterist ics (curves)

Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characteristics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance

3 Test circuit

Figure 13. Switching times test circuit for Figure 14. Gate charge test circuit Figure 15. Test circuit for inductive load Figure 16. Unclamped Inductive load test Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at : www.st.com

DIM. mm. inch A 4.40 4.60 0.173 0.181 b 0.61 0.88 0.024 0.034 b1 1.15 1.70 0.045 0.066 c 0.49 0.70 0.019 0.027 D 15.25 15.75 0.60 0.620 E 10 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 F 1.23 1.32 0.048 0.052 H1 6.20 6.60 0.244 0.256 J1 2.40 2.72 0.094 0.107 L 13 14 0.511 0.551 L1 3.50 3.93 0.137 0.154 L20 16.40 0.645 L30 28.90 1.137 øP 3.75 3.85 0.147 0.151 Q 2.65 2.95 0.104 0.116 TO-220 MECHANICAL DATA

5 Revision history

Table 7. Revision history 09-Sep-2004 1 First version. 17-Aug-2006 2 The document has been reformatted. 31-Jan-2007 3 Typo mistake on Ta ble 1.