STP3NA100 STMICROELECTRONICS | Alldatasheet
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N - CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR n TYPICAL RDS(on) = 4.3Ω n ± 30V GATE TO SOURCE VOLTAGE RATING n 100% AVALANCHE TESTED n REPETITIVE AVALANCHE DATA AT 100 oC n LOW INTRINSIC CAPACITANCES n GATE CHARGE MINIMIZED n REDUCED THRESHOLD VOLTAGE SPREAD
APPLICATIONS
n HIGH CURRENT, HIGH SPEED SWITCHING n SWITCH MODE POWER SUPPLIES (SMPS) n DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE INTERNAL SCHEMATIC DIAGRAM February 1998 TO-220 TO-220FI ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit STP3NA100 STP3NA100FI V DS Drain-source Voltage (VGS = 0) 1000 V V DGR Drain- gate Voltage (RGS =2 0k Ω ) 1000 V V GS Gate-source Voltage ± 30 V ID Drain Current (continuous) at Tc =2 5 o C3 . 5 2 . 0 A ID Drain Current (continuous) at Tc =1 0 0oC2 . 0 1 . 2 A IDM (•) Drain Current (pulsed) 14 14 A P tot Total Dissipation at Tc =2 5 oC1 1 0 4 5 W Derating Factor 0.88 0.36 W/ oC V ISO Insulation Withstand Voltage (DC) 2000 V Tstg Storage Temperature -65 to 150 oC Tj Max. Operating Junction Temperature 150 oC (•) Pulse width limited by safe operating area TYPE V DSS R DS(on) ID STP3NA100 STP3NA100FI 1000 V 1000 V <5 Ω <5 Ω 3.5 A
R thj-case Thermal Resistance Junction-case Max 1.14 2.78 oC/W R thj- amb R thc-sink Tl Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose 62.5 0.5 300 oC/W oC/W oC AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max, δ <1 % ) 3.5 A E AS Single Pulse Avalanche Energy (starting Tj =2 5 oC, ID =I AR ,V DD =5 0V ) 170 mJ ELECTRICAL CHARACTERISTICS (Tcase =2 5oC unless otherwise specified) OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit V (BR)DSS Drain-source Breakdown Voltage ID =2 5 0µ AV GS =0 1000 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) V DS =M a xR a t i n g V DS =M a xR a t i n g T c =1 2 5oC 250 µ A µ A IGSS Gate-body Leakage Current (VDS =0 ) V GS = ± 30 V ± 100 nA ON (∗) Symbol Parameter Test Conditions Min. Typ. Max. Unit V GS(th) Gate Threshold Voltage V DS =V GS ID =2 5 0µ A 2.25 3 3.75 V R DS(on) Static Drain-source On Resistance V GS =1 0 V ID = 1.5 A 4.3 5 Ω ID(on) On State Drain Current VDS >I D(on) xR DS(on)max V GS =1 0V 3.5 A DYNAMIC Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (∗)F o r w a r d Transconductance V DS >I D(on) xR DS(on)max ID =1 . 5A 1 . 5 3 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS =2 5V f=1M H z V GS = 0 1100 1430 110 pF pF pF STP3NA100/FI
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Time Rise Time V DD =5 0 0V I D =1 . 7A R G =4 . 7 Ω VGS =1 0V ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD =8 0 0V I D =3 . 5A VGS =1 0V 4 8 65 nC nC nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time V DD =8 0 0V I D =3 . 5A R G =4 7 Ω VGS =1 0V (see test circuit, figure 5) 125 ns ns ns SOURCE DRAIN DIODE Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) 3.5 A A V SD (∗) Forward On Voltage I SD =3 . 5A V GS =0 1 . 6 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 3.5 A di/dt = 100 A/µ s V DD =1 0 0V T j =1 5 0oC (see circuit, figure 5) 1000 ns µ C A (∗) Pulsed: Pulse duration = 300µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area for TO-220 Safe Operating Area for TO-220FP STP3NA100/FI
Thermal Impedance for TO-220 Output Characteristics Transconductance Thermal Impedance forTO-220FP Transfer Characteristics Static Drain-source On Resistance STP3NA100/FI
Gate Charge vs Gate-source Voltage Normalized Gate Threshold Voltage vs Temperature Source-drain Diode Forward Characteristics Capacitance Variations Normalized On Resistance vs Temperature STP3NA100/FI
Fig. 1:Unclamped Inductive Load Test Circuit Fig. 3:Switching Times Test Circuits For Resistive Load Fig. 2:Unclamped Inductive Waveform Fig. 4:Gate Charge test Circuit Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times STP3NA100/FI
DIM. mm inch A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 D1 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 A C D E F G Dia. TO-220 MECHANICAL DATA P011C STP3NA100/FI
DIM. mm inch A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.4 0.7 0.015 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 0.385 0.417 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 A B D E H G F 123 ISOWATT220 MECHANICAL DATA P011G STP3NA100/FI
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