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Document overview

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  • PDF pages: 14

Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.2 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package mechanical data
  • 4.1 TO-220 type A package information
  • 5 Revision history

Features

Order code VDS @ TJmax RDS(on) max. ID STP25N60M2-EP 650 V 0.188 Ω 18 A

  • Extremely low gate charge
  • Excellent output capacitance (COSS) profile
  • Very low turn-off switching losses
  • 100% avalanche tested
  • Zener-protected

Applications

  • Switching applications
  • Tailored for Very High Frequency Converters (f > 150 kHz)

Description

This device is an N-channel Power MOSFET developed using MDmesh™ M2 EP enhanced performance technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance, optimized switching characteristics with very low turn-off switching losses, rendering it suitable for the most demanding very high frequency converters. Table 1: Device summary Order code Marking Package Packaging STP25N60M2-EP 25N60M2EP TO-220 Tube

1 Electrical ratings

Table 2: Absolute maximum ratings Symbol Parameter Value Unit VGS Gate-source voltage ± 25 V ID Drain current (continuous) at TC = 25 °C 18 A ID Drain current (continuous) at TC = 100 °C 11.3 A IDM (1) Drain current (pulsed) 72 A PTOT Total dissipation at TC = 25 °C 150 W dv/dt(2) Peak diode recovery voltage slope 15 V/ns dv/dt(3) MOSFET dv/dt ruggedness 50 V/ns Tstg Storage temperature - 55 to 150 °C Tj Max. operating junction temperature Notes: (1)Pulse width limited by safe operating area. (2)ISD ≤ 18 A, di/dt ≤ 400 A/µs; VDS peak < V(BR)DSS, VDD = 400 V. (3)VDS ≤ 480 V Table 3: Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case max 0.83 °C/W Rthj-amb Thermal resistance junction-ambient max 62.5 °C/W Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax) 3.5 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR; VDD = 50 V) 200 mJ

2 Electrical characteristics

(TC = 25 °C unless otherwise specified) Table 5: On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 1 mA 600 V IDSS Zero gate voltage Drain current VGS = 0 V, VDS = 600 V 1 µA VGS = 0 V, VDS = 600 V, TC = 125 °C 100 µA IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2 3 4 V RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 9 A 0.175 0.188 Ω Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS= 100 V, f = 1 MHz, VGS = 0 V - 1090 - pF Coss Output capacitance - 56 - pF Crss Reverse transfer capacitance - 1.6 - pF Coss eq. (1) Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 255 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 7 - Ω Qg Total gate charge VDD = 480 V, ID = 18 A, VGS = 10 V (see Figure 16: "Gate charge test circuit") - 29 - nC Qgs Gate-source charge - 6 - nC Qgd Gate-drain charge - 12 - nC Notes: (1)Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS Table 7: Switching Energy Symbol Parameter Test conditions Min. Typ. Max. Unit E(off) Turn-off energy (from 90% VGS to 0% ID) VDD = 400 V, ID = 2 A RG = 4.7 Ω, VGS = 10 V - 7 - µJ VDD = 400 V, ID = 4 A RG = 4.7 Ω, VGS = 10 V - 8 - µJ

Table 8: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 300 V, ID = 9 A RG = 4.7 Ω, VGS = 10 V (see Figure 15: "Switching times test circuit for resistive load" and Figure 20: "Switching time waveform") - 15 - ns tr Rise time - 10 - ns td(off) Turn-off-delay time - 61 - ns tf Fall time - 16 - ns Table 9: Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current 18 A ISDM (1) Source-drain current (pulsed) 72 A VSD (2) Forward on voltage VGS = 0 V, ISD = 18 A - 1.6 V trr Reverse recovery time ISD = 18 A, di/dt = 100 A/µs, VDD = 100 V (see Figure 17: " Test circuit for inductive load switching and diode recovery times") - 360 ns Qrr Reverse recovery charge - 5 µC IRRM Reverse recovery current - 28 A trr Reverse recovery time ISD = 18 A, di/dt = 100 A/µs, VDD = 100 V, Tj = 150 °C (see Figure 17: " Test circuit for inductive load switching and diode recovery times") - 445 ns Qrr Reverse recovery charge - 6.5 µC IRRM Reverse recovery current - 29 A Notes: (1)Pulse width is limited by safe operating area (2)Pulsed: pulse duration = 300 µs, duty cycle 1.5%

2.2 Electrical characteristics (curves)

Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance ID (A) 0.1 0.1 1 100 VDS(V)10 10µs 100µs 1ms 10ms Operation in this area is limited by max R DS(on) Tj=150°C TC=25°C Single pulse GIPG011220141441ALS GC20510 tp 10-5 10-4 10-3 10-2 10-2 10-1 K δ = 0.5 Zth = k RthJ-c δ = tp / Ƭ 0.2 0.1 0.05 0.02 0.01 SINGLE PULSE 10-1 tp(s) Ƭ ID(A) 0 8 VDS(V)4 12 VGS = 6,7,8,9,10 V VGS = 5 V VGS = 4 V GIPG011220141438ALS GIPG281120141611ALSID(A) 0 4 VGS(V)82 6 VDS = 16 V 0 5 20 10 15 300 200 100 400 500 600 VDD = 480 V VDS VGS (V) Qg(nC) VDS (V) GIPG011220140958ALS 0.177 0.174 0.171 0.168 0 4 128 16 0.180 0.183 0.186 VGS = 10 V RDS(on)(Ω) ID(A) GIPG011220141210ALS

Figure 8: Capacitance variations Figure 9: Output capacitance stored energy Figure 10: Turn-off switching loss vs drain current Figure 11: Normalized gate threshold voltage vs temperature Figure 12: Normalized on-resistance vs temperature Figure 13: Source-drain diode forward characteristics 1000 100 0.1 10 VDS(V)1 100 CISS COSS CRSS C (pF) GIPG181120141549ALS 0 100 VDS(V)400200 300 500 600 EOSS (μJ) GIPG181120141603ALS 0 1 ID(A)42 3 5 6 EOSS (μJ) GIPG261120141106ALS 0.9 0.8 0.7 0.6 -75 -25 TJ(°C) 1.0 25 75 125 ID = 250 µA 1.1 VGS(th) (norm) GIPG181120141615ALS 1.4 1.0 0.6 0.2 -75 TJ(°C)-25 7525 125 1.8 2.2 VGS = 10 V RDS(on) (norm) GIPG181120141628ALS 0 4 ISD(A)8 0.6 0.7 0.9 0.8 1.0

1.1 TJ=-50°C

TJ=-50°C TJ=-50°C 12 16 VSD (V) GIPG191120141427ALS

Figure 14: Normalized V(BR)DSS vs temperature GIPG191120141457ALS -75 TJ(°C)-25 7525 125 0.88 0.92 0.96 1.04 1.00 1.08 ID = 1mA V(BR)DSS (norm)

STP25N60M2-EP Test circuits

3 Test circuits

Figure 15: Switching times test circuit for resistive load Figure 16: Gate charge test circuit Figure 17: Test circuit for inductive load switching and diode recovery times Figure 18: Unclamped inductive load test circuit Figure 19: Unclamped inductive waveform Figure 20: Switching time waveform AM01469v1 VDD 47 kΩ 1 kΩ 47 kΩ 2.7 kΩ 1 kΩ 12 V Vi ≤ VGS 2200 μF PW I G = CONST 100 Ω 100 nF D.U.T. VG V(B R)DS S VDDVDD VD IDM ID AM01472v1 AM01473v10 VGS 90% VDS ton 90% 10% 90% 10% td(on) tr t td(off) tf 10% off

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

4.1 TO-220 type A package information

Figure 21: TO-220 type A package outline

Table 10: TO-220 type A mechanical data Dim. mm Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 D 15.25 15.75 1.27 E 10 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13 L1 3.50 3.93 L20 16.40 L30 28.90 øP 3.75 3.85 Q 2.65 2.95

5 Revision history

Table 11: Document revision history Date Revision Changes 01-Dec-2014 1 First release. 12-Jan-2015 2 Updated product status from “preliminary data” to “production data”.