STP220N6F7 STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 13
Technical content
Datasheet sections
- 1 Electrical ratings
- 2 Electrical characteristics
- 2.1 Electrical characteristics (curves)
- 3 Test circuits
- 4 Package mechanical data
- 4.1 TO-220 package mechanical data
- 5 Revision history
Features
Order code VDS RDS(on)max ID PTOT STP220N6F7 60 V 0.0024 Ω 120 A 237 W Among the lowest RDS(on) on the market Excellent figure of merit (FoM) Low Crss/Ciss ratio for EMI immunity High avalanche ruggedness
Applications
Switching applications
Description
This N-channel Power MOSFET utilizes STripFET™ F7 technology with an enhanced trench gate structure that results in very low on- state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. Table 1: Device summary Order code Marking Package Packaging STP220N6F7 220N6F7 TO-220 Tube
1 Electrical ratings
Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 60 V VGS Gate-source voltage ±20 V ID(1) Drain current (continuous) 120 A ID(1) Drain current (continuous) at TC = 100 °C 120 A IDM(2) Drain current (pulsed) TC = 25 °C 480 A PTOT Total dissipation at TC = 25 °C 237 W EAS(3) Single pulse avalanche energy 1 J TJ Operating junction temperature -55 to 175 Tstg Storage temperature °C Notes: (1)Current limited by package (2)Pulse width is limited by safe operating area (3)Starting Tj = 25°C, Id = 20 A, Vdd = 50 V Table 3: Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case max 0.63 °C/W Rthj-amb Thermal resistance junction-ambient max 62.5 °C/W
2 Electrical characteristics
(TC = 25 °C unless otherwise specified) Table 4: On /off states Symbol Parameter Test conditions Min. Typ. Max. Uni t V(BR)DSS Drain-source breakdown voltage VGS = 0, ID = 1 mA 60 V IDSS Zero gate voltage drain current VGS = 0, VDS = 60 V 1 µA VGS = 0, VDS = 60 V, TC = 125 °C 100 µA IGSS Gate-body leakage current VDS = 0, VGS = + 20 V 100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2 4 V RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 60 A 0.002 0.002 4 Ω Table 5: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Uni t Ciss Input capacitance VGS = 0, VDS = 25 V, f = 1 MHz - 6400 - pF Coss Output capacitance - 3880 - pF Crss Reverse transfer capacitance - 175 - pF Qg Total gate charge VDD = 30 V, ID = 120 A, VGS = 10 V (see Figure 14: "Test circuit for gate charge behavior") - 100 - nC Qgs Gate-source charge - 36 - nC Qgd Gate-drain charge - 24 - nC Table 6: Switching times Symbol Parameter Test conditions Min. Typ. Max . Unit td(on) Turn-on delay time VDD = 30 V, ID = 60 A, RG = 4.7 Ω, VGS = 10 V (see Figure 13: "Test circuit for resistive load switching times") - 33 - ns tr Rise time - 103 - ns td(off) Turn-off delay time - 54 - ns tf Fall time - 29 - ns
Table 7: Source drain diode Symbol Parameter Test conditions Min Typ Max Un it VSD(1) Forward on voltage VGS = 0, ISD = 120 A - - 1.1 V trr Reverse recovery time ISD = 120 A, di/dt = 100 A/µs VDD = 48 V, TJ = 150 °C (see Figure 15: "Test circuit for inductive load switching and diode recovery times") - 69 ns Qrr Reverse recovery charge - 104 nC IRRM Reverse recovery current - 3 A Notes: (1)Pulsed: pulse duration = 300 µs, duty cycle 1.5%
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance GIPG051120141133MTID 0.1 1 VDS(V)10 (A) Operation in this area is Limited by max R DS(on) 1ms 10µs Tj=175°C Tc=25°C Single pulse 100µs 100 δ 0.05 0.02 0.01 0.1 0.2 GIPG051120141150MT ID 0 2 VDS(V)4 (A) VGS=8, 9, 10V 100 150 200 250 300 350 400 GIPG051120141159MTID 100 0 4 VGS(V)8 (A) 2 6 VDS=4V 150 200 250 300 350 GIPG051120141204MTVGS 0 60 Qg(nC) (V) 100 VDS=30V ID=120 A12 20 40 80 120 GIPG051120141354MTRDS(on) 2.10 2.06 2.02 0 20 ID(A) (mΩ) 2.14 VGS=10V 2.18 2.22 8060 100 120
3 Test circuits
Figure 13: Test circuit for resistive load switching times Figure 14: Test circuit for gate charge behavior Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
4.1 TO-220 package mechanical data
Figure 19: TO-220 type A package outline
Table 8: TO-220 type A mechanical data Dim. mm Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 D 15.25 15.75 1.27 E 10 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13 L1 3.50 3.93 L20 16.40 L30 28.90 øP 3.75 3.85 Q 2.65 2.95
5 Revision history
Table 9: Document revision history Date Revision Changes 17-Jun-2014 1 Initial release. 05-Nov-2014 2 Updated title and features in cover page. Updated Electrical rating and Electrical characteristics. Added Electrical characteristics (curves) . Minor text changes. 07-Oct-2015 3 Document status promoted from preliminary to production data.