STP120NF04_06 STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 14
Technical content
Datasheet sections
- 1 Electrical ratings
- 2 Electrical characteristics
- 2.1 Electrical characteristics (curves)
- 3 Test circuit
- 4 Package mechanical data
- 5 Revision history
N-channel 40V - 0.0047Ω - 120A TO-220 STripFET™ II MOSFET General features ■ Standard threshold drive ■ 100% avalanche tested
Description
This MOSFET is the latest development of STMicroelectronics unique “Single Feature Size™” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
Applications
■ Switching application Internal schematic diagram Type V DSS RDS(on) ID Pw STP120NF04 40V <0.0050 Ω 120A 300W TO-220 Order codes Part number Marking Package Packaging STP120NF04 P120NF04 TO-220 Tube
1 Electrical ratings
Table 1. Absolute maximum ratings
- Current Limited by Package
- Pulse width limited by safe operating area
- I SD ≤120A, di/dt ≤ 300A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.
Table 2. Thermal data
2 Electrical characteristics
Table 3. On/off states Table 4. Dynamic
- Pulsed: pulse duration=300µs, duty cycle 1.5%
Table 5. Source drain diode
- Pulse width limited by safe operating area
- Pulsed: pulse duration=300µs, duty cycle 1.5%
2.1 Electrical characterist ics (curves)
Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance
Figure 17. Allowable Iav vs time in avalanche
3 Test circuit
Figure 18. Switching times test circuit for Figure 19. Gate charge test circuit Figure 20. Test circuit for inductive load Figure 21. Unclamped Inductive load test Figure 22. Unclamped inductive wavefo rm Figure 23. Switching time waveform
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
DIM. mm. inch A 4.40 4.60 0.173 0.181 b 0.61 0.88 0.024 0.034 b1 1.15 1.70 0.045 0.066 c 0.49 0.70 0.019 0.027 D 15.25 15.75 0.60 0.620 E 10 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 F 1.23 1.32 0.048 0.052 H1 6.20 6.60 0.244 0.256 J1 2.40 2.72 0.094 0.107 L 13 14 0.511 0.551 L1 3.50 3.93 0.137 0.154 L20 16.40 0.645 L30 28.90 1.137 øP 3.75 3.85 0.147 0.151 Q 2.65 2.95 0.104 0.116 TO-220 MECHANICAL DATA
5 Revision history
Table 6. Revision history 28-Feb-2005 1 First release.