STP11NC40 STMICROELECTRONICS | Alldatasheet

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Technical content

STP11NC40, STP11NC40FP N-CHANNEL 400V - 0.44Ω - 9.5A TO-220/TO-220FP PowerMESH™II Power MOSFET ■ TYPICAL R DS (on) = 0.44 Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED ■ NEW HIGH VOLTAGE BENCHMARK ■ GATE CHARGE MINIMIZED

DESCRIPTION

The PowerMESH ™ II is the evolution of the first generation of MESH OVERLAY™. The layout re- finements introduced greatly improve the Ron*area figure of merit while keeping the device at the lead- ing edge for what concerns swithing speed, gate charge and ruggedness.

APPLICATIONS

■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVER

ORDERING INFORMATION

TYPE V DSS R DS(on) ID Pw STP11NC40 STP11NC40FP 400 V 400 V < 0.55 Ω < 0.55 Ω 9.5 A

9.5 A(*)

SALES TYPE MARKING PACKAGE PACKAGING STP11NC40 P11NC40 TO-220 TUBE STP11NC40FP P11NC40FP TO-220FP TUBE TO-220 TO-220FP INTERNAL SCHEMATIC DIAGRAM

STP11NC40, STP11NC40FP ABSOLUTE MAXIMUM RATINGS (/c108 ) Pulse width limited by safe operating area (1) ISD ≤9.5A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS , Tj ≤ TJMAX. (*) Limited only by maximum temperature allowed THERMAL DATA AVALANCHE CHARACTERISTICS ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF Symbol Parameter Value Unit STP11NC40 STP11NC40FP VDS Drain-source Voltage (VGS = 0) 400 V VDGR Drain-gate Voltage (RGS = 20 kΩ ) 400 V VGS Gate- source Voltage ± 30 V ID Drain Current (continuos) at TC = 25°C 9.5 9.5 (*) A ID Drain Current (continuos) at TC = 100°C 6 6 (*) A IDM (/c108 ) Drain Current (pulsed) 38 38 (*) A PTOT Total Dissipation at TC = 25°C 120 30 W Derating Factor 0.96 0.24 W/°C dv/dt (1) Peak Diode Recovery voltage slope 3.5 V/ns VISO Insulation Withstand Voltage (DC) - 2500 V Tj Tstg Operating Junction Temperature Storage Temperature -55 to 150 -55 to 150 TO-220 TO-220FP Rthj-case Thermal Resistance Junction-case Max 1.04 4.1 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 9.5 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR , VDD = 50 V) 300 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 400 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating, TC = 125 °C µA µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 30V ±100 nA VGS(th) Gate Threshold Voltage VDS = VGS , ID = 250µA 234V R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 5 A 0.44 0.55 Ω

STP11NC40, STP11NC40FP ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) DYNAMIC SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (1) Forward Transconductance V DS = 15 V, ID = 5 A 8.6 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, f = 1 MHz, VGS = 0 995 172 pF pF pF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 200 V, ID = 5 A R G = 4.7Ω VGS = 10 V (Resistive Load see, Figure 3) ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 320V, ID = 10 A, VGS = 10V 32.5 45.5 nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off Delay Time Fall Time VDD = 320 V, ID = 5 A R G =4 . 7Ω VGS = 10 V (Resistive Load see, Figure 3) ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time VDD = 320V, ID = 10 A, R G =4 . 7Ω, VGS = 10V (Inductive Load see, Figure 5) 7.5 ns ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit I SD ISDM (2) Source-drain Current Source-drain Current (pulsed) 9.5 A A VSD (1) Forward On Voltage ISD = 9.5 A, VGS = 0 1.6 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 9.5 A, di/dt = 100A/µs VDD = 100V, Tj = 150°C (see test circuit, Figure 5) 315 2100 13.6 ns nC A Safe Operating Area For TO-220FPSafe Operating Area For TO-220

STP11NC40, STP11NC40FP Output Characteristics Thermal Impedance For TO-220 Static Drain-source On Resistance Thermal Impedance For TO-220FP Transfer Characteristics Transconductance

STP11NC40, STP11NC40FP Normalized Gate Threshold Voltage vs Temperature Source-drain Diode Forward Characteristics Normalized On Resistance vs Temperature Capacitance VariationsGate Charge vs Gate-source Voltage Normalized BVDSS vs Temperature

STP11NC40, STP11NC40FP Maximum Avalanche Energy vs Temperature Id vs Temperature

STP11NC40, STP11NC40FP Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4: Gate Charge test Circuit Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuit For Resistive Load

STP11NC40, STP11NC40FP DIM. mm inch A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 D1 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 A C D E F G Dia. TO-220 MECHANICAL DATA P011C

STP11NC40, STP11NC40FP A B D E H G ¯ F 123F2 L4L5 DIM. mm. inch A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 TO-220FP MECHANICAL DATA

STP11NC40, STP11NC40FP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com