STF10NM60ND STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package mechanical data
  • 5 Packaging mechanical data
  • 6 Revision history

Features

■ 100% avalanche tested ■ Low input capacitance and gate charge ■ Low gate input resistance ■ Extremely high dv/dt avalanche capabilities

Applications

■ Switching applications

Description

This FDmesh™ II Power MOSFET with intrinsic fast-recovery body diode is produced using the second generation of MDmesh™ technology. Utilizing a new strip-layout vertical structure, this revolutionary device features extremely low on- resistance and superior switching performance. It is ideal for bridge topologies and ZVS phase-shift converters. Figure 1. Internal schematic diagram Table 1. Device summary

1 Electrical ratings

Table 2. Absolute maximum ratings

  1. Limited by maximum junction temperature.
  2. Pulse width limited by safe operating area.
  3. I SD ≤ 8 A, di/dt ≤ 400 A/µs, VDS peak ≤ V(BR)DSS, VDD = 80% V(BR)DSS.

Table 3. Thermal data Table 4. Avalanche characteristics

2 Electrical characteristics

Table 5. On /off states Table 6. Dynamic

  1. C oss eq. time related is defined as a constant equivalent capacitance giving the same charging time as Coss

Table 7. Switching times

Table 8. Source drain diode

  1. Pulse width limited by safe operating area.
  2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area for DPAK Figure 3. Thermal impedance for DPAK Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP Figure 6. Safe operating area for TO-220 Figure 7. Thermal impedance for TO-220

Figure 8. Output characteristics Figure 9. Transfer characteristics Figure 10. Gate charge vs gate-source voltage Figure 11. Static drain-source on resistance Figure 12. Capacitance variations Figure 13. Output capacitance stored energy

0.60 VGS=10V

Figure 14. Normalized gate threshold voltage Figure 15. Normalized on resistance vs Figure 16. Source-drain diode forward Figure 17. Normalized V DS vs temperature

1.2 TJ=-50°C

3 Test circuits

Figure 18. Switching times test circuit for Figure 19. Gate charge test circuit Figure 20. Test circuit for inductive load Figure 21. Unclamped inductive load test Figure 22. Unclamped inductive wavefo rm Figure 23. Switching time waveform

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.

Table 9. DPAK (TO-252) mechanical data

Figure 26. TO-220FP drawing Table 10. TO-220FP mechanical data

Table 11. TO-220 type A mechanical data

Figure 27. TO-220 type A drawing

5 Packaging mechanical data

Table 12. DPAK (TO-252) tape and reel mechanical data

6 Revision history

Table 13. Document revision history 10-Feb-2011 1 First release. Updated features in table and description in cover page.