STB10N95K5 STMICROELECTRONICS | Alldatasheet

Document overview

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  • PDF pages: 22

Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package mechanical data
  • 5 Packaging mechanical data
  • 6 Revision history

Features

  • Worldwide best FOM (figure of merit)
  • Ultra low gate charge
  • 100% avalanche tested
  • Zener-protected

Applications

  • Switching applications

Description

These N-channel Zener-protected Power MOSFETs are designed using ST’s revolutionary avalanche-rugged very high voltage SuperMESH™ 5 technology, based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance, and ultra-low gate charge for applications which require superior power density and high efficiency. 7$% AM01476v1 TO-220 TO-220FP TAB TO-247 TAB D PAK2 Order codes V DS RDS(on) max I D PTOT STB10N95K5 950 V 0.8 Ω 8 A 130 W STF10N95K5 30 W STP10N95K5 130 W STW10N95K5 Table 1. Device summary

1 Electrical ratings

Table 2. Absolute maximum ratings

  1. Limited by maximum junction temperature.
  2. Pulse width limited by safe operating area.

Table 3. Thermal data

  1. When mounted on 1 inch² FR-4, 2 Oz copper board

2 Electrical characteristics

Table 4. On /off states Table 5. Dynamic

  1. Time related is defined as a constant equivalent capacitance giving the same charging time as C oss when
  2. energy related is defined as a constant equival ent capacitance giving the same stored energy as Coss

voltage is appropriate to achieve efficient and cost-effective protection of device integrity. The integrated Zener diodes thus eliminate the need for external components. Table 6. Switching times Table 7. Source drain diode

  1. Pulse width limited by safe operating area
  2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%

Table 8. Gate-source Zener diode

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area for D2PAK and Figure 3. Thermal impedance for D2PAK and Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP Figure 6. Safe operating area for TO-247 Figure 7. Thermal impedance for TO-247

Figure 8. Output characteristics Figure 9. Transfer characteristics Figure 10. Gate charge vs gate-source voltage Figure 11. Static drain-source on-resistance Figure 12. Capacitance variations Figure 13. Output capacitance stored energy

0 VDS(V)

3 Test circuits

Figure 19. Switching times test circuit for Figure 20. Gate charge test circuit Figure 21. Test circuit for inductive load Figure 22. Unclamped inductive load test circuit Figure 23. Unclamped inductive waveform Figure 24. Switching time waveform

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

Figure 25. D²PAK (TO-263) drawing Table 9. D²PAK (TO-263) mechanical data

Figure 26. D²PAK footprint(a) Table 9. D²PAK (TO-263) mechanical data (continued)

Figure 27. TO-220FP drawing

Table 10. TO-220FP mechanical data

Figure 28. TO-220 type A drawing

Table 11. TO-220 type A mechanical data

Figure 29. TO-247 drawing Table 12. TO-247 mechanical data

Table 12. TO-247 mechanical data (continued)

5 Packaging mechanical data

Figure 30. Tape

Figure 31. Reel Table 13. D²PAK (TO-263) tape and reel mechanical data

6 Revision history

Table 14. Document revision history 24-Jun-2013 1 First release.