STF10N105K5 STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 18
Technical content
Datasheet sections
- 1 Electrical ratings
- 2 Electrical characteristics
- 2.1 Electrical characteristics (curves)
- 3 Test circuits
- 4 Package mechanical data
- 4.1 TO-220 package mechanical data
- 4.2 TO-247 package mechanical data
- 4.3 TO-220FP package mechanical data
- 5 Revision history
Features
Order codes VDS RDS(on) max. ID PTOT STF10N105K5 1050 V 1.3 Ω 6 A 30 W STP10N105K5 130 W STW10N105K5 130 W Industry’s lowest RDS(on) Industry’s best figure of merit (FoM) Ultra low gate charge 100% avalanche tested Zener-protected
Applications
Switching applications
Description
These very high voltage N-channel Power MOSFETs are designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Table 1: Device summary Order codes Marking Package Packaging STF10N105K5 10N105K5 TO-220FP Tube STP10N105K5 10N105K5 TO-220 Tube STW10N105K5 10N105K5 TO-247 Tube 1 2 3 TAB TO-220 TO-220FP 1 2 3 TO-247 D(2, TAB) G(1) S(3) AM01476v1
1 Electrical ratings
Table 2: Absolute maximum ratings Symbol Parameter Value Unit TO-220 TO-247 TO-220FP VGS Gate- source voltage 30 V ID Drain current (continuous) at TC = 25 °C 6 A ID Drain current (continuous) at TC = 100 °C 3.78 A IDM (1) Drain current (pulsed) 24 A PTOT Total dissipation at TC = 25 °C 130 30 W IAR Max. current during repetitive or single pulse avalanche 2 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAS, VDD = 50 V) 140 mJ dv/dt(2) Peak diode recovery voltage slope 4.5 V/ns dv/dt(3) MOSFET dv/dt ruggedness 50 V/ns VISO Insulation withstand voltage (RMS) from all three leads to external heatsink (t = 1 s; TC = 25 ° C) 2500 V Tj Tstg Operating junction temperature Storage temperature -55 to 150 °C Notes: (1)Pulse width limited by safe operating area. (2)ISD ≤ 6 A, di/dt ≤ 100 A/µs, Vpeak ≤ V(BR)DSS. (3)VSD ≤ 840. Table 3: Thermal data Symbol Parameter Value Unit TO-220 TO-247 TO-220FP Rthj-case Thermal resistance junction-case max. 0.96 °C/W Thermal resistance junction-case max. 4.2 Rthj-amb Thermal resistance junction-ambient max. 62.50 °C/W
2 Electrical characteristics
(Tcase = 25 °C unless otherwise specified) Table 4: On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage ID = 1 mA, VGS = 0 1050 V IDSS Zero gate voltage, drain current (VGS = 0) VDS = 1050 V 1 µA VDS = 1050 V, TC = 125 °C 50 µA IGSS Gate-body leakage current VGS = ± 20 V; VDS = 0 10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 3 4 5 V RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 3 A 1 1.3 Ω Table 5: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS =100 V, f = 1 MHz, VGS = 0 545 pF Coss Output capacitance 30 pF Crss Reverse transfer capacitance 1.3 pF Co(tr) (1) Equivalent capacitance time related VGS = 0, VDS = 0 to 840 V 65 pF Co(er) (2) Equivalent capacitance energy related 22 pF RG Intrinsic gate resistance f = 1 MHz open drain 7 Ω Qg Total gate charge VDD = 840 V, ID = 6 A VGS =10 V 21.5 nC Qgs Gate-source charge 3.3 nC Qgd Gate-drain charge 15.5 nC Notes: (1)Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. (2)Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS. Table 6: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 525 V, ID = 3 A, RG = 4.7 Ω, VGS = 10 V - ns tr Rise time 8 ns td(off) Turn-off-delay time 50 ns tf Fall time 21.5 ns
Table 7: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current 6 A ISDM (1) Source-drain current (pulsed) 24 A VSD (2) Forward on voltage ISD = 6 A, VGS = 0 1.5 V trr Reverse recovery time ISD = 6 A, di/dt = 100 A/µs VDD = 60 V 345 ns Qrr Reverse recovery charge 3.53 µC IRRM Reverse recovery current 20.5 A trr Reverse recovery time ISD = 6 A, di/dt = 100 A/µs VDD = 60 V TJ = 150 °C 540 ns Qrr Reverse recovery charge 5.05 µC IRRM Reverse recovery current 18.5 A Notes: (1)Pulse width limited by safe operating area. (2)Pulsed: pulse duration = 300 µs, duty cycle 1.5%. Table 8: Gate-source Zener diode Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)GSO Gate-source breakdown voltage IGS = ± 1 mA, ID = 0 30 - - V The built-in back-to-back Zener diodes have been specifically designed to enhance the ESD capability of the device. The Zener voltage is appropriate for efficient and cost - effective intervention to protect the device integrity. These integrated Zener diodes th us eliminate the need for external components.
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area for TO-220 Figure 3: Thermal impedance TO-220 Figure 4: Safe operating area for TO-220FP Figure 5: Thermal impedance TO-220FP Figure 6: Safe operating area for TO-247 Figure 7: Thermal impedance TO-247 ID 0.1 1 VDS(V)10 (A) Operation in this area isLimited by max R DS(on) 1ms 100µs 0.01 Tj=150°C Tc=25°C Single pulse 10ms 100 0.1 1000 GIPG150920141258LM δ=0.5 Single pulse 0.05 0.02 0.01 0.1 0.2 K 10 tp(s)-5 10-4 10-3 10 10-2 10-1 10-2 -1 GIPG150920141341LM ID 0.1 1 VDS(V)10 (A) Operation in this area isLimited by max R DS(on) 1ms 100µs 0.01 Tj=150°C Tc=25°C Single pulse 10ms 100 0.1 1000 GIPG160920140929LM δ=0.5 Single pulse 0.05 0.02 0.01 0.1 0.2 K tp(s)10-4 10-3 10 10-1 10-2 10-2 -1 10 0 GIPG160920141014LM ID 0.1 1 VDS(V)10 (A) Operation in this area isLimited by max R DS(on) 1ms 100µs 0.1 Tj=150°C Tc=25°C Single pulse 10ms 100 0.01 1000 GIPG160920141037LM δ=0.5 Single pulse 0.05 0.02 0.01 0.1 0.2 K 10 tp(s)-5 10-4 10-3 1010-2 10-1 10-2 -1 GIPG160920141054LM
STF10N105K5, STP10N105K5, STW10N105K5 Test circuits
3 Test circuits
Figure 18: Switching times test circuit for resistive load Figure 19: Gate charge test circuit Figure 20: Test circuit for inductive load switching and diode recovery times Figure 21: Unclamped inductive load test circuit Figure 22: Unclamped inductive waveform Figure 23: Switching time waveform
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
4.1 TO-220 package mechanical data
Figure 24: TO-220 type A drawings 0015988_typeA_Rev_T
Table 9: TO-220 type A mechanical data Dim. mm Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 D 15.25 15.75 1.27 E 10 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13 L1 3.50 3.93 L20 16.40 L30 28.90 øP 3.75 3.85 Q 2.65 2.95
4.2 TO-247 package mechanical data
Figure 25: TO-247 drawings
Table 10: TO-247 mechanical data Dim. mm Min. Typ. Max. A 4.85 5.15 A1 2.20 2.60 b 1.0 1.40 b1 2.0 2.40 b2 3.0 3.40 c 0.40 0.80 D 19.85 20.15 E 15.45 15.75 e 5.30 5.45 5.60 L 14.20 14.80 L1 3.70 4.30 18.50 øP 3.55 3.65 øR 4.50 5.50 S 5.30 5.50 5.70
4.3 TO-220FP package mechanical data
Figure 26: TO-220FP drawings 7012510_Rev_K_B
Table 11: TO-220FP mechanical data Dim. mm Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Ø 3 3.2
5 Revision history
Table 12: Document revision history Date Revision Changes 07-Oct-2014 1 First release. 14-Oct-2014 2 Document status promoted from preliminary to production data.