STN1HNC60 STMICROELECTRONICS | Alldatasheet
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Technical content
N-CHANNEL 600V - 7Ω - 0.4A - SOT-223 PowerMesh™II MOSFET ■ TYPICAL R DS (on) = 7Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED ■ NEW HIGH VOLTAGE BENCHMARK ■ GATE CHARGE MINIMIZED
DESCRIPTION
The PowerMESH ™ II is the evolution of the first generation of MESH OVERLAY™. The layout re- finements introduced greatly improve the Ron*area figure of merit while keeping the device at the lead- ing edge for what concerns swithing speed, gate charge and ruggedness.
APPLICATIONS
■ AC ADAPTORS AND BATTERY CHARGERS ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE V DSS R DS(on) ID STN1HNC60 600 V < 8 Ω 0.4 A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 600 V VDGR Drain-gate Voltage (RGS = 20 kΩ ) 600 V VGS Gate- source Voltage ±30 V ID Drain Current (continuos) at TC = 25°C 0.4 A ID Drain Current (continuos) at TC = 100°C 0.25 A IDM (1) Drain Current (pulsed) 1.6 A PTOT Total Dissipation at TC = 25°C 2.5 W Derating Factor 0.02 W/°C dv/dt Peak Diode Recovery voltage slope 3.5 V/ns Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature 150 °C (1)ISD ≤0.4A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS , Tj ≤ TJMAX SOT-223 INTERNAL SCHEMATIC DIAGRAM
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF ON (1) DYNAMIC Rthj-pcb Rthj-amb Tl Thermal Resistance Junction-PC Board Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 300 °C/W °C/W Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 0.4 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR , VDD = 50 V) 100 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 600 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1µ A VDS = Max Rating, TC = 125 °C 50 µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ±30V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS = VGS , ID = 250µA 234V R DS(on) Static Drain-source On Resistance VGS = 10V, ID =0.7 A 78 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (1) Forward Transconductance V DS > ID(on) x RDS(on)max, ID = 0.7A 1.25 S C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 160 pF C oss Output Capacitance 26 pF C rss Reverse Transfer Capacitance 3.8 pF
ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 300V, ID = 0.7A R G = 4.7Ω VGS = 10V (see test circuit, Figure 3) ns ns Q g Total Gate Charge VDD = 480V, ID = 1.4A, VGS = 10V 8.5 11.5 nC Q gs Gate-Source Charge 2.8 nC Q gd Gate-Drain Charge 2.8 nC Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) Off-voltage Rise Time VDD = 480V, ID = 1.4A, R G =4 . 7Ω, VGS = 10V (see test circuit, Figure 5) 25 ns tf Fall Time 9 ns tc Cross-over Time 34 ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD Source-drain Current 0.4 A ISDM (2) Source-drain Current (pulsed) 1.6 A VSD (1) Forward On Voltage ISD = 0.4 A, VGS = 0 1.6 V trr Reverse Recovery Time ISD = 1.4A, di/dt = 100A/µs, VDD = 100V, Tj = 150°C (see test circuit, Figure 5) 500 ns Q rr Reverse Recovery Charge 950 nC IRRM Reverse Recovery Current 3.8 A Thermal ImpedanceSafe Operating Area
Transconductance Static Drain-source On Resistance Output Characteristics Transfer Characteristics Gate Charge vs Gate-source Voltage Capacitance Variations
Source-drain Diode Forward Characteristics Normalized On Resistance vs TemperatureNormalized Gate Thereshold Voltage vs Temp.
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4: Gate Charge test Circuit Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuits For Resistive Load
DIM. mm inch A 1.80 0.071 e 2.30 0.090 e1 4.60 0.181 V1 0 o 10o A1 0.02 P008B SOT-223 MECHANICAL DATA
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