STM2DPFS30L

STM2DPFS30L STMICROELECTRONICS | Alldatasheet

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P - CHANNEL 30V - 0.145Ω - 2A MiniS0-8 STripFET MOSFET PLUS SCHOTTKY RECTIFIER PRELIMINARY DATA DESCRIPTION: This product associates the latest low voltage StripFET in p-channel version to a low drop Schottky diode. Such configuration is extremely versatile in implementing a large variety of DC-DC converters for printers, portable equipment, and cellular phones. New MiniSO-8 package features: n Half footprint area versus standard SO-8, for application where minimum circuit board space is necessary. n Extremely low profile, ideal for low thickness equipment. INTERNAL SCHEMATIC DIAGRAM July 1999 MOSFET ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VDS Drain-source Voltage (VGS =0 ) 3 0 V V DGR Drain- gate Voltage (RGS =2 0k Ω )3 0 V V GS Gate-source Voltage ± 20 V ID Drain Current (continuous) at Tc =2 5 oC2 A ID Drain Current (continuous) at Tc = 100 oC1 . 3 A IDM (•) Drain Current (pulsed) 8 A P tot Total Dissipation at Tc =2 5 oC1 . 2 5 W MAIN PRODUCT CHARACTERISTICS MOSFET V DSS R DS(on) ID 30V <0.165 Ω 2A SCHOTTKY IF( AV) V RRM V F(MAX) 1A 40V 0.55V MiniSO-8 SCHOTTKY ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V RRM Repetitive Peak Reverse Voltage 40 V IF(RMS) RMS Forward Current 2 A IF(AV) Average Forward Current T a=60 o C δ =0.5 1.2 A IFSM Surge Non Repetitive Forward Current tp= 10 ms Sinusoidal 5.5 A dv/dt Critical Rate Of Rise Of Reverse Voltage 10000 V/ µ s (•) Pulse width limited by safe operating area Note: For the P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed

(*) Thermal Resistance Junction-ambient MOSFET Storage Temperature Range Maximum Junction Temperature 100 -65 to 150 150 oC/W o C o C (*)Mounted on a 1 in2 pad of 2oz Cu in FR-4 board MOSFET ELECTRICAL CHARACTERISTICS (Tcase =2 5oC unless otherwise specified) OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit V (BR)DSS Drain-source Breakdown Voltage ID =2 5 0µ AV GS =0 3 0 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) V DS =M a xR a t i n g V DS =M a xR a t i n g T c = 125 oC µ A µ A IGSS Gate-body Leakage Current (VDS =0 ) V GS = ± 20 V ± 100 nA ON (∗) Symbol Parameter Test Conditions Min. Typ. Max. Unit V GS(th) Gate Threshold Voltage VDS =V GS ID = 250 µ A1 1 . 7 2 . 5 V R DS(on) Static Drain-source On Resistance V GS =1 0 V ID =1A V GS =4 . 5 V ID =1A 0.145 0.18 0.165 0.2 Ω ID(on) On State Drain Current VDS >I D(on) xR DS(on )max V GS =1 0V DYNAMIC Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (∗)F o r w a r d Transconductance V DS >I D(on) xR DS(on )max ID =1 A 2 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS =2 5V f=1M H z V GS = 0 510 170 660 220 pF pF pF STM2DPFS30L

ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time V DD =1 5V I D =1 . 5A R G =4 . 7Ω V GS =4 . 5V (Resistive Load, see fig. 1) 14.5 ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD =2 4V I D =3A V GS =5V 5 . 5 1.7 1.8 nC nC nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off Delay Time Fall Time V DD =1 5V I D =1 . 5A R G =4 . 7Ω V GS =4 . 5V (Resistive Load, see fig. 1) ns ns SOURCE DRAIN DIODE Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) A A V SD (∗)F o r w a r d O n V o l t a g e ISD =2A V GS =0 1 . 2 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD =2A d i / d t=1 0 0A /µ s V DD = 15V T j = 150 oC tbd ns nC Α (∗) Pulsed: Pulse duration = 300µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area SCHOTTKY STATIC ELETTRICAL CHARACTERISTICS Symbol Parameter Test Conditions Min. Typ. Max. Unit IR (∗) Reversed Leakage Current TJ=2 5 oCV R =40V TJ=1 0 0oCV R =40V 1.5 µ A mA V F(∗) Forward Voltage drop T J=2 5 oCI F =1A TJ=1 0 0oCI F =1A TJ=2 5 oCI F =2A TJ=1 0 0oCI F =2A 0.45 0.55 0.51 0.7 0.7 V V V V STM2DPFS30L

Fig. 1: Switching Times Test Circuits For Resistive Load Fig. 2: Gate Charge test Circuit STM2DPFS30L

DIM. mm inch A 1.10 A1 0.10 A2 0.86 D 3.00 D2 2.95 E 4.90 E1 3.00 E2 2.95 E3 0.51 E4 0.51 R 0.15 R1 0.15 t1 0.31 t2 0.41 θ1 3.0 ° θ2 12.0 ° L 0.55 L1 0.95 e 0.65 S 0.525 MiniSO-8 MECHANICAL DATA STM2DPFS30L

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