STL120NH02V STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 3 Test circuit
  • 4 Package mechanical data
  • 5 Revision history

This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice. September 2006 Rev 2 1/10 STL120NH02V N-channel 20V - 0.0025Ω - 120A - PowerFLAT™ (6x5) STripFET™ III Power MOSFET General features ■ Improved die-to-footprint ratio ■ Very low profile package (1mm max) ■ Very low thermal resistance ■ Conduction losses reduced ■ 2.5V gate drive ■ Switching losses reduced ■ Very low threshold device

Description

The STL120NH02V utilizes the latest advanced design rules of ST’s proprietary STripFET™ Technology. Thanks to a very low threshold, it is ideal for Synchronous Buck Converter in point of load brick module. The Chip-scaled PowerFLAT™ package allows a significant board space saving, still boosting the performance.

Applications

■ Switching application Internal schematic diagram Type V DSS RDS(on) ID STL120NH02V 20V <0.003 Ω 28A(1) 1. Value limited by wire bonding (Chip scale package) Order codes Part number Marking Package Packaging STL120NH02V L120NH02V PowerFLAT TM (6x5) Tape & reel

1 Electrical ratings

Table 1. Absolute maximum ratings

  1. Pulse width limited by safe operating area
  2. When mounted on FR-4 board of 1in², 2oz Cu. t<10sec
  3. The value is rated according R thj-C.

Table 2. Thermal data

  1. When mounted on FR-4 board of 1in², 2oz Cu. t<10sec

Table 3. Avalanche characteristics

2 Electrical characteristics

Table 4. On/off states Table 5. Dynamic

  1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.

Table 6. Source drain diode

  1. Pulse width limited by safe operating area.
  2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %

3 Test circuit

Figure 1. Switching times test circuit for Figure 2. Gate charge test circuit Figure 3. Test circuit for inductive load Figure 4. Unclamped Inductive load test Figure 5. Unclamped inductive wavefo rm Figure 6. Switching time waveform

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com

DIM. mm. inch A1 0.02 0.05 0.0007 0.0019 A3 0.20 0.007 D 5.00 0.196 D1 4.75 0.187 E 6.00 0.236 E1 5.75 0.226 e 1.27 0.050 PowerFLAT™ (6x5) MECHANICAL DATA

5 Revision history

Table 7. Revision history