STH4N90FI | DigiCamel IC Datasheet

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STH4N90 STMICROELECTRONICS | Alldatasheet

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a S7 SGS-THOMSON STH4N90 MICROELECTRONICS STH4N90FI rer _: SONS EE N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR SSeS IN PANSY [Wee [vou [Reco | STH4N90 900 V <3.22 42A STH4NOOFI gov | <329 | 27A (og « TYPICAL Roster) = 2.92 » AVALANCHE RUGGED TECHNOLOGY a 100% AVALANCHE TESTED » REPETITIVE AVALANCHE DATA AT 100°C y ., «LOW INPUT CAPACITANCE 2 2 «LOW GATE CHARGE 1 1 » APPLICATION ORIENTED CHARACTERIZATION 0.218 IsowaTt218

APPLICATIONS

a HIGH CURRENT, HIGH SPEED SWITCHING » SWITCH MODE POWER SUPPLIES (SMPS) / s CONSUMER AND INDUSTRIAL LIGHTING = DC-AC INVERTERS FOR WELDING INTERNAL SCHEMATIC DIAGRAM EQUIPMENT AND UNINTERRUPTIBLE 3) POWER SUPPLY (UPS) @ (1) s (3) ABSOLUTE MAXIMUM RATINGS | Wes —[Bransouce Volage Wea e [eos [orn- gee Votage Gas = a0) | 00] [es Jeateseutes Votage ae |_to [Drain Current (continuous) atTe= 25°C | 42] [to [eran Curent (contnuow)-atTe= 100° | ee Pe owt Toran curenr (puss) te [Pia [Tota Disspaton at 223° as [erating Faster] [eo relaton Winsiand Vatage (06) 00 [i — [as Opvaing duncan Temperate [60 () Pulse width limited by safe operating area April 1993 1/10

Thermal Impedeance For TO-218 Thermal Impedance For ISOWATT218 i ee 8 | oat Pao “a voe LUI TTT TU vo~ Scam LTT TT Co o.2 Tit rin Tit Pag a ih . : Cre ee za Mae cor 0.01 Ht a= bare som eer I O rorafsneue ruse |] = 7" EPtsincie puise iil a ste vo-2L TT TTT vo LOTT TTT io 107 1075 107? 1078 tp (s) to 107% 1072 107! 10° #(s) Derating Curve For TO-218 Derating Curve For ISOWATT218 Po WM ITTITT TTT IIT TTT | Prot) TTT TTT TIT] COCO eee eee CACC eee COC eee CEP eer rere | eo EEE CEPR EERE ere COCR eer so SEE COCO Nee COCAREC ECC ee eof LLLP NEC wo LOCOS) COCO COCCCPRECCee eee] SESS See so EEE COCO NE COCCCCCE NE woe Pe a COCO Perr COC er COCO to Ee COCCI COCO EES CeCe CP eer rr] CEECCCe eT creresr] ° 50 100 Tease (°C) [) 50 100 Tease (°C) Output Characteristics Transfer Characteristics ccres30 ectasso Pool T TTT TT vestov || POT TT #77, | of pean Der See /a HHA ee s_LITTLavri tty LTA LEE ETT yt tA Te Li tT Tt tg [| fa] fo Sane) AEH HY ac / A tt tT A ASSESSES [| tT Ay a 10 20 30 40 Vos (¥) ) 2 4 6 Ves (V) ano A5y7 SGS;THOMSON

Turn-on Current Slope Turn-off Drain-source Voltage Slope at /at ccrs740 dv /at cc19730 C77) we{ TT TT TT TT TI col | TIT TT Ivey =soov st TTT TT Tye. =s00v BENEEEE LINE TT ver=tov col | | NUIT yess aN TT Tiers BERR NEEEE PITT NTT TT ott tT TN] TT s-tT TT NTT Pt tT yy AeA Pty PT PNET ol | TTT TTT TT I at ET TT SAS PTT TT Tt yyy | See LETT Tt i tt iy wT TT ET eT o 50 100 150 200 R.(n) [) 50 100 150 200 Re(n) Cross-over Time Switching Safe Operating Area ocis7sa ocera10 “eT TTT TTT TTI bo PT tt | tt | | EEE EERE EEE EEE EEEHEH COCOA EEE sess, PET rt LAT COCCrry ty =180%e Freer 200 | A aCOPP eee | Aw _| EOC eee Z| Vo =600¥ COCO Cece Pt TTT | vero [| EEE oe “EEEEEEEEEEEEEH LTT Titi itt EEREEEEEEEEEEEEEE 0) 50 100 150 200 R,(n) 0 200 400 © 600» B00 Vps(V) Accidental Overload Area Source-drain Diode Forward Characteristics Ip (A) SSeS Iso (A) =——— ECCEEEEEEEEEE EEE | a SS SS OS | reEEEECEEEEEEEEESoEETH ee COCCer eee eee [t=tso%c | | 2sec] | [Veg=0| COCO 10! ee EEE ECE sao CECE ===> a=1 a PEESEH ig aaaus PESEEEEH RAR BEE LIA | | i HERR CSS === aCe eee | | 107 LTE ttt tet | t) 200° 400 600 BOO Vos (V) 0 1 2 3 4 Vso(¥) oe ____ TO

Fig. 1: Unclamped Inductive Load Test Circuits Fig. 2: Unclamped Inductive Waveforms Vearyoss . Vo — Yo 2200 | 3.3 uF BF Yoo tow 1 “A -° Ip y “\\ — Yoo “ A Yoo ‘ DUT. / \\ Ld A Lene Pw come | Fig. 3: Switching Times Test Circuits For Fig. 4: Gate Charge Test Circuit Resistive Load oY 00 100nF Ri 2200 33 ue uF Yoo { = Yo ¥1220V=Veur '*PMST — so0n Du, | Yea O ea a — Ra pwr. 2200 we I A — 47K _ SIL ees Tika i ve Fig. 5: Test Circuit For Inductive Load Switching And Diode Reverse Recovery Time ca] A OA 2 wos: chee ae ET, LetoquH 250 ° QP oP lve c OU.T. + Re G / esa ceo ‘Y/ wacrosuscrnomcs

Transconductance Static Drain-source On Resistance ©) setesso Rosen ccte3eo wr TTT TT Ty | ey | TTT TT | I | | et se | pert ra cs L Were LT ttt tt yy 7 oe ‘COPE fo | |vmezef | = “eee RPA Viti t ty fy | LTTE TET a 1 2 3 Ip(A) 0 2 4 6 Ip (A) Gate Charge vs Gate-source Voltage Capacitance Variations ccrs70 ccraseo vs TT TTTTTTITI I I CleF) TT TTT Tet fy wo CT vezsaoe TTA a AH aS OEE aoa. SESReee 4a so0 | | TP TT oP ====" 45008 PTT Fazer [I Pit tT tT tt Tt TT | 100 Tt [| este [TT JCC \\ Ut Ac EEE EEE INET af_T Tt tT TT tt yt 200 KSSEECATS POCO b= SSE85 AGRE [ co Fe 0 10 20 30 40 Qg(nc) 0 10 2030.40 Vos(V) Normalized Gate Threshold Voltage vs Normalized On Resistance vs Temperature Temperature tex Coo Roster), PITT T TTT ee) erm) FCC eee (norm) FC CECCCCCCee eee Vos=Ves FC] ECE CC Cee eer eee 1a CONSETT tp=tma CO 20 COCOA CCS co EEC CCC COCO NRCC Soe Se eee COCOONS eer Soo eee

1.0 CCCCCCASEC Cer} 1s COCCCCCCC ee

0.9 FLOCCCCCC Se 1 POCO AA

08 FEE EE Eee eee AS 05 HEE esi

COC eee er COCO b=1.74_ COCO CCC eee CeCe cere

0.7 COREE eee ery 9 COORe rere eee

ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON [_symbot | Parameter | Test Conditions [_min. | typ. [ Max. | unit | tafon) [Turn-on Time Voo=30V Ip=2.3A 65 90 te Rise Time Re=50Q2 Ves=10V 150 | 200 (see test circuit, figure 3) (di/dt) on |Turn-on Current Slope |Vop=600 V Ip=3.8A 110 Alus Re = 502 Ves = 10 V (see test circuit, figure 5) Qg _~—--|Total Gate Charge Vop = 400 V Ip=5A Ves=10V 70 nc Qgs |Gate-Source Charge nc Qga Gate-Drain Charge nc SWITCHING OFF [ symbot | Parameter |____Test Conditions| Min. | Typ. [ Max. | Unit | tr(vott) Off-voltage Rise Time |Vopo=600 V Ip=3.8A 110 145 tt Fall Time Re=50Q2 Vas=10V 140 190 te Cross-over Time (see test circuit, figure 5) 150 | 200 SOURCE DRAIN DIODE [ sympot | Parameter | Test Conditions [ min. | typ. [ Max. | unit | Iso Source-drain Current A Ispm(*) |Source-drain Current A (pulsed) |_Vso(+) [Forward On Voltage iso=42A Vos=0 | TT 2 Tv | tre Reverse Recovery Isp =3.8 A di/dt = 100 A/us 500 ns Time Va=100V Tj= 150 °C Qrr Reverse Recovery (see test circuit, figure 5) 4.3 we Charge Innm [Reverse Recovery 17 A (*) Pulsed: Pulse duration = 300 ps, duty cycle 1.5% (+) Pulse width limited by safe operating area Safe Operating Areas For TO-218 Safe Operating Areas For ISOWATT218 ecoa729 oczoaso as | ie Sa fT 10, LT ar aC! rot LUT Te ATI TTT

4 SONI CRTN t0qus 5 | Rs Soa 1003

at] 4 4 NN q 8% NNT SPY vo LCS TNT o LATS ENN me pS SS S58 SSE eR tome “Ee Ps Oms “CA SSNS CO CS so0ms ACCOM CTE STI 100ms Peg 10 TT NTT sxe Soi SS Seti SSEii SSSR: Se oc. 2 co oY See eT a 2 Cn yo? OT eo OCI Oo 10° 10! 10 103 Vps (¥) 10° 10° 10? 10 Vos (V) ST4 wacroausctromes

| Rove [Thermal Resistance —incton-caso——wax[ 1 ear | "ow Rihj-amo [Thermal Resistance Junction-ambient Max 30 °cw Rthe-sink |Thermal Resistance Case-sink Typ 0.1 cw Ti Maximum Lead Temperature For Soldering Purpose 300 °c AVALANCHE CHARACTERISTICS [Symbor [ameter a Vale lan Avalanche Current, Repetitive or Not-Repetitive A (pulse width limited by Tj max, 6 < 1%) Single Pulse Avalanche Energy mJ (starting Tj = 25 °C, lo = lar, Von = 50 V) Ear Repetitive Avalanche Energy 10 mJ (pulse width limited by Tj max, < 1%) lan Avalanche Current, Repetitive or Not-Repetitive A (Tc = 100 °C, pulse width limited by Tj max, 8 < 1%) ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) OFF [‘Symbar_[Paramter [Test Conaiions [win | Typ. | Wax_| Unit] Viaryoss |Drain-source Ip = 250 nA Vas=0 Vv Breakdown Voltage Zero Gate Voltage Vos = Max Rating 250 pA Drain Current (Vas = 0) |Vos = Max Rating x 0.8 Te = 125°C 1000 yA less Gate-body Leakage Ves =+ 20 V +100 nA Current (Vos = 0) ON (+) Ros(on) |Static Drain-source On |Vag =10V Ip=1.7A 3.2 Resistance Ves =10V_ Ip=1.7A Te = 100°C 6.4 locon) On State Drain Current |Vos > Ip(on) X Ros(on)max 4.2 A Ves = 10 V DYNAMIC gis (*) |Forward Vos > lovon) X Ros(onymax lo=1.7A] 1 Transconductance Ciss [Input Capacitance Vos=25V f=1MHz Vas=0 1100 pF Coss Output Capacitance 150 pF Cres Reverse Transfer 55 pF Capacitance ff $68-THOMON ‘Y/ macrosscTnomes

Fig. 1: Unclamped Inductive Load Test Circuits Fig. 2: Unclamped Inductive Waveforms V(ar)oss ‘ Vp — v ° 2200 | 3.3 uF BF Yoo tow i] 7A .? Ip “ \\ — Yoo “ N Yoo “ [ OUT. —s vo \\ LI iw eee Pw scame sxou079 Fig. 3: Switching Times Test Circuits For Fig. 4: Gate Charge Test Circuit Resistive Load Ved 12v 47K 0 1 100nF 7 RL 2200 | 3.3 BF BF Yoo — Yo vi=20¥=Veux ‘NST t00 pus, Ji a Op * % T - Ko =e SIL gc “pt Tike a coe Fig. 5: Test Circuit For Inductive Load Switching And Diode Reverse Recovery Time D ~ “A Ok ¢ Doce BAST. Let00,H s .# 33 | ta00 = 8 5 wF [HF | vy G Out. + Re is 4 asa ewe 7A0 SY7 wicroausctnomics

70-218 (SOT-93) MECHANICALDATA po ee ee a foe [wf [oe poo es ome a a i oar te ere Ta a ec [ae [se [ee a a Poe foe FT et Pose Poses wi ° a Ls Le L3 —) uw R 123 PO25A SY7 wcrosuactnomcs

Product Information

STH4N90FI specifications and overview.

Summary

N-CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR Apr-1993

Description

N-CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR Apr-1993

Source title STH4N90FI Datasheet(PDF) - STMicroelectronics

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