STG4158 STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Logic diagram
  • 2 Maximum rating
  • 3 Electrical characteristics
  • 4 Application information
  • 5 Test circuits
  • 6 Package mechanical data
  • 7 Revision history

Features

■ Power-off and over-voltage protection ■ Wide operating voltage range: VCC (opr) = 1.65 to 4.5 V ■ Low ON resistance VIN =0V : –R ON =0 . 8 5Ω (max) at VCC =4 . 5V ■ Latch-up performance exceeds 300 mA JESD 17 ■ ESD performance tested on (D pin) – 8 kV IEC-61000-4-2 ESD, contact discharge – 15 kV IEC-61000-4-2 ESD, air discharge ■ ESD performance test on all other pins – 3 kV Human-Body-Model – 200 V machine model (IEC61340-3-2 level M2) – 1000 V charge-device model (JESD22 C101)

Description

The STG4158 is a high-speed CMOS low voltage single analog SPDT (single pole dual throw) switch or 2:1 multiplexer/ demultiplexer switch fabricated in silicon gate C 2MOS technology. Designed to operate from 1.65 to 4.5 V, this device is ideal for portable applications. It offers low ON resistance (0.6Ω) at V CC =4 . 5V ( typical TA = 25 ºC). The SEL input threshold is compatible to 1.8 V, and provides control to the switches. The switch S1 is ON (connected to common port D) when the SEL input is held high and OFF (high impedance state exists between the two ports) when SEL is held low. The switch S2 is ON (connected to common port D) when the SEL input is held low and OFF (high impedance state exists between the two ports) when SEL is held high. The SEL input has an integrated weak pull-down resistor to prevent SEL signal from floating. For low power consumption, the SEL input must be grounded. Power-off and over-voltage protection The STG4158 features power-off and over- voltage protection, enabling the device to be isolated during voltage fault events. Flip-Chip6 Table 1. Device summary

1 Logic diagram

Figure 1. Functional diagram Figure 2. Input equivalent circuit Table 2. Truth table

Figure 3. Pin connection (bump side view) Table 3. Pin description

5 D Common channel

6 SEL Control

2 GND Ground (0V)

2 Maximum rating

Program and other relevant quality documents. Table 4. Absolute maximum ratings

  1. Derate above 70ºC by 18.5 mW/C

Table 5. Recommended operating conditions

3 Electrical characteristics

Table 6. DC specifications

Table 6. DC specifications (continued)

Table 7. AC electrical characteristics (CL =3 5p F , RL =5 0 Ω, tr =t f ≤ 5n s )

1.95 VS =V CC

1.95 CL =3 5p F

Table 8. Analog switch characteristics (CL =5p F , RL =5 0 Ω, TA =2 5° C )

  1. OFF-isolation = 20 log 10 (VD/VS), VD = output, VS = input to off switch

4 Application information

D. The S1, S2, D ports have a 1 MΩ impedence to ground. into isolation mode or normal operation mode accordingly. in the application environment. Table 9. Voltage conditions

4.5 V 0–V CC

Figure 4. Voltage conditions floating. For lower power consumption, the SEL input must be grounded.

5 Test circuits

Figure 5. ON resistance Figure 6. Bandwidth

6 Package mechanical data

conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 14. Flip-Chip6 package outline

  1. The terminal pin 1 on the bumps side is identified by a distinguishing feature (for instance by a circular

distinguishing feature (for instance by a circular "dot" - typically 0.5 mm diameter).

Figure 17. Flip-Chip6 tape specification

Figure 18. Flip-Chip6 reel information)

7 Revision history

Table 11. Document revision history 12-Nov-2007 1 Initial release.