STG3680_05 STMICROELECTRONICS | Alldatasheet

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Technical content

I HIGH SPEED: tPD = 0.3ns (TYP.) at VCC = 3.0V tPD = 0.4ns (TYP.) at VCC = 2.3V I ULTRA LOW POWER DISSIPATION: I CC = 0.2µA (MAX.) at TA = 85°C I LOW "ON" RESISTANCE VIN = 0V: RON-S1 = 0.5Ω (MAX. TA = 25°C) at VCC=2.7V RON-S2 = 0.8Ω (MAX. TA = 25°C) at VCC=2.7V I WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 1.65V to 4.3V SINGLE SUPPLY I 4.3V TOLERANT AND 1.8V COMPATIBLE THRESHOLD ON DIGITAL CONTROL INPUT at VCC = 2.3 to 3.0V I LATCH-UP PERFORMANCE EXCEEDS 300mA (JESD 17) I ESD PERFORM. (ANALOG CHAN. vs GND): HBM > 7KV (MIL STD 883 method 3015)

DESCRIPTION

The STG3680 is an high-speed CMOS DUAL ANALOG S.P.D.T. (Single Pole Dual Throw) SWITCH or DUAL 2:1 Multiplexer/Demultiplexer Bus Switch fabricated in silicon gate C 2MOS technology. It is designed to operate from 1.65V to 4.3V, making this device ideal for portable applications. It offers very low ON-Resistance (<0.5 Ω 1S1 and 2S1 channels; <0.8 Ω 1S2 and 2S2 channels) at VCC=2.7V. The nIN inputs are provided to control the switches. The switches nS1 are ON (they are connected to common Ports Dn) when the nIN input is held high and OFF (high impedance state exists between the two ports) when nIN is held low; the switches nS2 are ON (they are connected to common Ports Dn) when the nIN input is held low and OFF (high impedance state exists between the two ports) when IN is held high. Additional key features are fast switching speed, Break Before Make Delay Time and Ultra Low Power Consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. It’s available in the commercial temperature range in the QFN package. STG3680 LOW VOLTAGE 0.5/0.8Ω MAX DUAL SPDT SWITCH WITH BREAK BEFORE MAKE FEATURE Figure 1: Pin Connection Table 1: Order Codes PACKAGE T & R QFN STG3680QTR QFN Rev. 5

Figure 2: Input Equivalent Circuit Table 2: Pin Description Table 3: Truth Table (*) High Impedance Table 4: Absolute Maximum Ratings Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. (1) Derate above 70°C: by 18.5mW/°C. Table 5: Recommended Operating Conditions 1) Truth Table guaranteed: 1.2V to 4.3V. QFN PIN N° SYMBOL NAME AND FUNCTION 1, 9 1IN, 2IN Controls 2, 10 4, 12 1S1 to 2S1 1S2 to 2S2 Independent Chan- nels 3, 11 D1, D2 Common Channels 5,7,8,13,15,16 NC Not Connected

6 GND Ground (0V)

14 V CC Positive Supply

H ON OFF(*) L OFF(*) ON Symbol Parameter Value Unit VCC Supply Voltage -0.5 to 4.6 V VI DC Input Voltage -0.5 to V CC + 0.5 V VIC DC Control Input Voltage -0.5 to 4.6 V VO DC Output Voltage -0.5 to V CC + 0.5 V IIKC DC Input Diode Current on control pin (V IN < 0V) − 50 mA IIK DC Input Diode Current (VIN < 0V) ± 50 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 300 mA IOP DC Output Current Peak (pulse at 1ms, 10% duty cycle) ± 500 mA ICC or IGND DC VCC or Ground Current ± 100 mA PD Power Dissipation at Ta=70°C (1) 1120 mW Tstg Storage Temperature -65 to 150 °C TL Lead Temperature (10 sec) 300 °C Symbol Parameter Value Unit VCC Supply Voltage (note 1) 1.65 to 4.3 V VI Input Voltage 0 to V CC V VIC Control Input Voltage 0 to 4.3 V VO Output Voltage 0 to V CC V Top Operating Temperature -55 to 125 °C dt/dv Input Rise and Fall Time Control Input V CC= 1.65V to 2.7V 0 to 20 ns/VVCC= 3.0V to 4.3V 0 to 10

Table 6: DC Specifications Note 1: Guaranteed by design Note 2: ∆RON = RON(MAX) - RON(MIN). Note 3: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the speci fied analog signal ranges. Symbol Parameter Test Conditions Value UnitVCC (V) TA = 25°C -40 to 85°C -55 to 125°C VIH High Level Input Voltage V 3.3 1.5 1.5 1.5 3.6 1.7 1.7 1.7 4.3 2.2 2.2 2.2 VIL Low Level Input Voltage V 3.3 0.50 0.50 0.50 3.6 0.50 0.50 0.50 4.3 1.3 1.3 1.3 RON-S1 Switch ON-S1 Resistance (1) 4.3 V S=0V to VCC IS=100mA 0.80 0.80 Ω 3.0 0.80 0.80 2.7 0.80 0.80 2.3 2 2 1.8 4.0 5.0 1.65 4.0 5.0 R ON-S2 Switch ON-S2 Resistance (1) 4.3 VS=0V to VCC IS=100mA 0.40 0.50 0.60 Ω 3.0 0.40 0.50 0.60 2.7 0.40 0.50 0.60 2.3 0.50 0.80 0.80 1.8 0.70 3.0 4.0 1.65 0.80 3.0 4.0 ON ON Resist. Match between channels (1, 2) 2.7 V S=1.5V IS=100mA 0.06 Ω RFLAT ON Resistance FLATNESS (3) 4.3 V S=1.5V IS=100mA Ω 3.0 2.7 0.07 0.15 0.15 2.3 1.65 V S=0.8V IS=100mA IOFF OFF State Leakage Current (nSn), (Dn) 4.3 VS=0.3 or 4V ±10 ± 100 nA IIN Input Leak. Current 0 - 4.3 V IN= 0 to 3.6V ±0.1 ± 1 µA ICC Quiescent Supply Current (1) 1.65-4.3 V IN=VCC or GND ±0.05 ±0.2 ±1 µA

Table 7: AC Electrical Characteristics (CL = 35pF, RL = 50Ω, tr = tf ≤ 5ns) Table 8: Analog Switch Characteristics (CL = 5pF, RL = 50Ω, TA = 25°C) Note 1: Off Isolation = 20Log10 (VD/VS), VD = output. VS = input at off switch Symbol Parameter Test Condition Value UnitVCC (V) TA = 25°C -40 to 85°C -55 to 125°C tPLH, tPHL Propagation Delay 1.65-1.95 VI=OPEN 0.45 ns2.3-2.7 0.40 3.0-3.6 0.30 3.6-4.3 0.30 t ON TURN-ON time 1.65-1.95 V S=0.8V 70 ns 2.3-2.7 V S=1.5V 30 50 60 3.0-3.6 V S=1.5V 30 50 60 3.6-4.3 V S=1.5V 30 50 60 tOFF TURN-OFF time 1.65-1.95 V S=0.8V 45 ns 2.3-2.7 V S=1.5V 25 30 40 3.0-3.6 V S=1.5V 25 30 40 3.6-4.3 V S=1.5V 25 30 40 tD Break Before Make Time Delay 1.65-1.95 CL=35pF RL= 50Ω VS=1.5V ns2.3-2.7 2 15 3.0-3.6 2 15 3.6-4.3 2 15 Q Charge injection 1.65-1.95 C L= 100pF RL= 1MΩ VGEN= 0V RGEN= 0Ω pC2.3-2.7 40 3.0-3.6 35 3.6-4.3 35 Symbol Parameter Test Condition Value UnitVCC (V) TA = 25°C -40 to 85°C -55 to 125°C OIRR Off Isolation (1) 1.65-4.3 V S= 1VRMS f= 100KHz -64 dB Xtalk Crosstalk 1.65-4.3 V S= 1VRMS f= 100KHz -54 dB THD Total Harmonic Distortion 2.3-4.3 R L= 600Ω VIN= 2VPP f= 20Hz to 20kHz 0.03 % BW -3dB Bandwidth 1.65-4.3 R L= 50Ω 50 MHz CIN Control Pin Input Capacitance 5 pFCSn Sn Port Capaci- tance 3.3 f= 1MHz 37 CD D Port Capaci- tance when Switch is Enabled 3.3 f= 1MHz 84

Table 9: Turn ON, Turn OFF Delay Time

DIM. mm. inch A1 0.02 0.05 0.001 0.002 A3 0.20 0.008 D 3.00 0.118 E 3.00 0.118 e 0.50 0.020 K 0.20 0.008 r 0.09 0.006 QFN16 (3x3) MECHANICAL DATA E A e K b r K LA3 D

DIM. mm. inch A 330 12.992 C 12.8 13.2 0.504 0.519 D2 0 . 2 0 . 7 9 5 N6 0 2 . 3 6 2 T 18.4 0.724 Ao 3.3 0.130 Bo 3.3 0.130 Ko 1.1 0.043 Po 4 0.157 P 8 0.315 Tape & Reel QFNxx/DFNxx (3x3) MECHANICAL DATA

Table 10: Revision History Date Revision Description of Changes 14-May-2004 3 Characteristics at VCC = 4.3 V Added on Tables 3, 4, 5, 6 and 7. 01-Jun-2004 4 ESD Performance (Analog Channels) added on top page. 04-Jul-2005 5 The Q Values on Table 7 has been updated.

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