STF13NM60N-H STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package mechanical data
  • 5 Revision history

Features

■ 100% avalanche tested ■ Low input capacitance and gate charge ■ Low gate input resistance Application ■ Switching applications

Description

This series of devices implements second generation MDmesh™ technology. This revolutionary Power MOSFET associates a new vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. Figure 1. Internal schematic diagram Table 1. Device summary

  1. The device meets ECOPACK® standards, an environmental ly-friendly grade of products commonly referred to as

“halogen-free” . See Section 4: Package mechanical data.

1 Electrical ratings

Table 2. Absolute maximum ratings

  1. Limited only by maximu m temperature allowed
  2. Pulse width limited by safe operating area

Table 3. Thermal data Table 4. Avalanche characteristics

2 Electrical characteristics

Table 5. On/off states

  1. Characteristic value at turn off on inductive load

Table 6. Dynamic

  1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
  2. C oss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS

Table 7. Switching times Table 8. Source drain diode

  1. Pulse width limited by safe operating area
  2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%

2.1 Electrical characterist ics (curves)

Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Safe operating area for DPAK Figure 5. Thermal impedance for DPAK Figure 6. Output characteristics Figure 7. Transfer characteristics

Figure 8. Transconductance Figure 9. Static drain-source on resistance Figure 10. Gate charge vs gate-source voltage Figure 11. Capacitance variations Figure 12. Normalized gate threshold voltage Figure 13. Normalized on resistance vs

0 Qg(nC)

3 Test circuits

Figure 16. Switching times test circuit for Figure 17. Gate charge test circuit Figure 18. Test circuit for inductive load Figure 19. Unclamped inductive load test Figure 20. Unclamped inductive wavefor m Figure 21. Switching time waveform

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Obsolete Product(s) - Obsolete Product(s)

Figure 22. TO-220FP drawing Table 9. TO-220FP mechanical data

5 Revision history

Table 10. Document revision history