TCPP02-M18 STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 27
Technical content
Datasheet sections
- 1 Pinout and functions
- 2 Block diagram
- 3 Typical USB-C source application block diagram
- 4 Electrical specification
- 4.1 Parameter conditions
- 4.2 Absolute maximum ratings
- 4.3 Recommended operating conditions
- 4.4 Power supply (VCC_VCONN, VBUSc)
- 4.5 VBUS OCP
- 4.6 CC lines OVP and ESD
- 4.7 VCONN OCP, discharge
- 4.8 I2C slave
- 5 Typical electrical characteristics curves
- 6 Functional description
- 6.1 Overview
- 6.2 Power modes
- 6.3 I2C registers
- 7 Protection features
- 7.1 FLGn pin description
- 7.2 How to protect against ESD (electrostatic discharge) applied on the USB Type-C™
- 7.3 VBUS management
- 7.4 VBUS current sense (IANA pin)
- 7.5 VBUS analog current measurement and OCP
- 7.6 VCONN OCP
- 7.7 VCONN CC line OVP
- 7.7.1 CC lines short to VBUS
- 7.8 VBUS discharge
- 7.9 VCONN discharge
- 7.10 OTP (over temperature protection)
- 8 Application example
- 8.1 X-NUCLEO-SRC1M1
- 8.2 STEVAL-2STPD01
- 8.3 PCB routing
Features
- Externally programmable VBUS over current protection (OCP)
- Integrated charge pump and gate driver for external N-channel MOSFET
- VBUS current sense and amplifier with analog output
- Integrated discharge on VBUS and VCONN
- Over temperature protection
- Over voltage protection (OVP) on CC lines against short-to-V BUS
- V CONN OCP (100 mW max), OVP (6 V max)
- ESD protection for CC1, CC2, compliant with IEC 61000-4-2 Level 4 (±8 kV contact discharge, ±15 kV air discharge)
- Compliant with PPS (programmable power supply)
- I2C communication, with two I2C addresses available
- Junction temperature from -40 °C to 125 °C
- Compliant with USB-C power delivery standard 3.1, standard power range (SPR), up to 100 W
- ECOPACK2 compliant
Applications
- USB-C chargers, adapters, power sharing adapters, battery charger
- Wall plugs, car charger, PoE to USB-C adapter, power bank
- Desktop, monitor, docking, USB hub, dual-port charger
Description
The TCPP02-M18 is a MCU companion chip enabling cost-effective USB-C source solution. It provides protections and functionalities to safely comply with the USB-C specification. On provider path, TCPP02-M18 drives external N-channel MOSFET to ensure overcurrent protection on VBUS pin, as well as a discharge path. It features an analog current sense and amplifier with an output accessible for a MCU ADC, thus minimizing system cost. The TCPP02-M18 features 24 V tolerant ESD protection as per IEC61000-4-2 level 4 on USB Type-C™ connector communication channel pins (CC). Also, it provides overvoltage protection on CC1 and CC2 pins when these pins are subjected to short circuit with the VBUS pin that may happen when removing the USB Type-C™ cable from its receptacle. TCPP02-M18 embeds I2C slave registers with two possible addresses, ideal for dual-port chargers or multiple port applications. Product labels Product status link TCPP02-M18 Expansion board X-NUCLEO-SRC1M1 Software example code X-CUBE-TCPP I2C address 0110 10x (LSB = ‘x’) ST reference design STEVAL-2STPD01 USB Type-C™ protection for source application TCPP02-M18 Datasheet DS13787 - Rev 4 - May 2022 For further information contact your local STMicroelectronics sales office.
1 Pinout and functions
Figure 1. QFN-18L 3.5 x 3.5 x 0.55 mm (top view) Table 1. Pinout and functions CC1 2 Input / Output Configuration channel 1 pin on USB-C controller side. VCC_VCONN 3 Power Power supply for VCONN power pin. Connect to 3.3 V or 5.5 V. CC2 4 Input / Output Configuration channel 2 pin on USB-C controller side. IANA 5 Output VBUS current analog measurement. GATE 6 Output Gate driver provider: gate pin of external N-channel MOSFET. SRC 7 Input Gate driver provider: source pin of external N-channel MOSFET. VBUSc 8 Input VBUS connector side. Isense 9 Input VBUS current measurement. CC2c 11 Input / Output Configuration channel 2 pin on USB-C connector side. CBIAS 12 Output ESD capacitor. CC1c 13 Input / Output Configuration channel 1 pin on USB-C connector side. I2C_ADD 15 Input Least significant bit on I2C address. Connected to GND or 1.8 V / 3.3 V. SDA 16 Input / Output Serial data line on I2C bus. SCL 17 Input / Output Serial clock line on I2C bus. FLGn 18 Output Open-drain output flag (active low). Floating when not connected. GND EP GND Ground exposed pad.
2 Block diagram
Figure 2. TCPP02-M18 functional block diagram Figure 3. Internal block diagram
3 Typical USB-C source application block diagram
Figure 4. Typical application example BOM) for detailed application usage of TCPP02-M18 and selection of external components. External components are described in External components description. Please refer to TA0357 for an overview of USB Type-C™ and power delivery technologies. MCUs and STM32xxx series MPUs. Type-C™ protection and filtering.
4 Electrical specification
4.1 Parameter conditions
- All voltages are referenced to GND
- The minimum and maximum values are guaranteed in the worst conditions of operating temperature, supply voltage and frequencies, by tests in production on 100 % of the devices
- Typical values are given only as design guidelines and are not tested
4.2 Absolute maximum ratings
device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute maximum ratings (across junction temperature range) Table 3. ESD ratings (across junction temperature range)
- Internal ESD protection functionality is associated with external capacitor connected on pin C BIAS.
Note: for more information on IEC61000-4-2 standard testing, please refer to AN3353.
4.3 Recommended operating conditions
Table 4. Recommended operating condition, across junction temperature range
4.4 Power supply (VCC_VCONN, VBUSc)
Table 5. Electrical characteristics – Power supply (VCC_VCONN, VBUSc) across Tj
- Equivalent discharge resistor is 2.5 kΩ typical.
4.5 VBUS OCP
Table 6. Electrical characteristics for VBUS (OCP, gate driver, current monitoring) across Tj
4.6 CC lines OVP and ESD
Table 7. Electrical characteristics: CC lines OVP (CC refers to CC1 and CC2) across Tj
4.7 VCONN OCP, discharge
Table 8. Electrical characteristics VCONN switch (OCP, discharge) across Tj
4.8 I2C slave
Table 9. Electrical characteristics I2C adressing across Tj
5 Typical electrical characteristics curves
Figure 5. CC line (CC1 or CC2) OVP response time Note: Test conditions for Figure 5: TCPP02-M18 in normal mode VCC_VCONN = +5 V, ENABLE = 3.3 V, VBUS = 0 V.
6 Functional description
6.1 Overview
(UCPD) controller or other low voltage power delivery controller. Please refer to TA0357 for an overview of USB Type-C™ and power delivery technologies. MCUs and STM32xxx series MPUs.
6.2 Power modes
The TCPP02-M18 embeds three distinct power modes controlled by the UCPD controller via the I2C bus. Figure 6. Power modes process
- No power source Low power:
- PD communication impracticable Start - up I2C command Unattached State I2C command Attached State No DC current on ENABLE No DC current on VCC_VCONN Low DC current on ENABLE No DC current on VCC_VCONN Normal DC current on ENABLE Normal DC current on VCC_VCONNNormal:
- Full performances TCPP02-M18 Functional description DS13787 - Rev 4 page 9/27
Table 10. Power mode versus power supply
3.3 V ±10%
5 V ±10%
- Dynamic current of I2C interface have to be added to the values indicated when the I2C bus is used.
- ESD leakage current have to be added to the values indicated.
- For pin EN voltage between 1.7 V and 3.6 V.
Table 11. TCPP02-M18 states versus power modes
6.3 I2C registers
The I2C address used by TCPP02-M18 is 0110 10x, with LSB = ‘x’. Figure 7. I2C registers
- S w i t ch load close d G D P =0 :
- S w i t ch load opened V BU S D =1 :
- V BU S discha r ge O N V BU S D =0 :
- V BU S discha r ge O F F V BU S D I S CH A R G E ( V BU S D ) FL G n O C P_V C O N N FL G n O TP FL G n O C P_V BU S V C O NN D I S CH A R G E ( V C O NND ) V C O NND =1 :
- V C O NN discha r ge O N V C O NND =0 :
- V C O NN discha r ge O F F V C O NN D I S CH A R G E Acknowledge B i t 7 B i t 6 B i t 5 B i t 4 B i t 3 B i t 2 B i t 1 B i t 0 V C O NN 1 FL G n O VP_ C C V C O NN 2 G a t e D r i v e r P ro v i d e r V BU S D I S CH A R G E FL G n V BU S_ O K P M 2 Power Mode 2 P M 2 P M 1 P o w e r M od e 0 0 Hi b e r n a t e 1 0 Lo w po w er 0 1 N o r m a l 1 1 N o t U se d P M 1P M 2 I 2 C a dd r ess : 0 1 10 10x , x = L SB W r i t i ng r e g i s t e r ( a ddr ess = 0 ) R ea d i ng r e g i s t e r n ° 2 ( a ddr ess = 2 ) R ea d i ng r e g i s t e r n ° 1 ( a ddr ess = 1 ) Flags are set to '1' when active 0 => TCPP03 1 => TCPP02 AcknowledgeAcknowledge Acknowledge Acknowledge 0 at start-up else acknowledge AcknowledgeAcknowledge P M 1 Power Mode 1 Flags are set to '1' when active Not used TCPP02-M18 I2C registers DS13787 - Rev 4 page 11/27
7 Protection features
TCPP02-M18 embeds protection features for source applications, as required by:
- USB-C specification
- USB power delivery specification 3.1
- International electrotechnical commission (IEC)
7.1 FLGn pin description
FLGn pin is an open-drain output flag in steady state, it must be left floating when not connected. In normal mode, FLGn indicates an error (OVP, OCP or OTP): I2C registers must be read to identify the error. Recovery for each error type is described in each section of below paragraphs.
7.2 How to protect against ESD (electrostatic discharge) applied on the USB Type-
C™ connector? Electrostatic discharges can be conducted by the USB Type-C™ connector and damage the electronic circuitry of the application. The international electrotechnical commission modelize the ESD surge waveform in the specification IEC61000-4-2. The TCPP02-M18 integrates ESD protection for CC1 and CC2 lines up to +8 kV contact discharge, associated with an external 100 nF - 50 V capacitor on CBIAS pin. Please refer to AN4871 USB Type-C™ protection and filtering to apply a required protection to comply with the IEC61000-4-2 specification. For more information on IEC61000-4-2 standard testing, please refer to the STMicroelectronics application note AN3353.
7.3 VBUS management
Until now, it was common to find the protection circuit inside a controller dedicated to USB-C power delivery. However, by supporting USB-C PD with an embedded module inside an MCU and a companion Type-C port protection device, you can lower your bill of material and facilitate the transition , without requiring an expensive USB-C PD ASIC controller. One of the reasons the MCU and TCPP02-M18 bundle is such a compelling financial proposition is that the latter device integrates the VBUS gate drivers, which enables the use of cheaper and smaller N-MOSFETs, instead of the P-MOSFETs usually used by ASIC controllers.
7.4 VBUS current sense (IANA pin)
The IANA output pin is active only in normal mode. The IANA output can be connected directly to the STM32 ADC input because it is internally biased by EN pin. The IANA output voltage level is about 1.7 V at the OCP tripping level allowing connection to 1.8 V MCU I/O pin. TCPP02-M18 Protection features DS13787 - Rev 4 page 12/27
7.5 VBUS analog current measurement and OCP
VBUS OCP threshold is set by external serial resistor on VBUS. The gain for the analog reading is set to 42 V/V. The OCP threshold is set to 0.042 V across Rs. The OCP VBUS is biased by VCC_VCONN and works only in normal mode. Figure 8. Equivalent block diagram in TCPP02-M18
42 V/V
Table 12. Recommended values The OCP is biased continuously: inrush current magnitude is controlled by the user through an external capacitor.
- V CONN switches, CC switches and gate drivers are shutting down
- During up to 40 µs typ., this OCP alarm is held (no recovery is possible)
- After this delay, CC switches are turned ON but V CONN switches and gate drivers are held OFF The system can be restarted only with a recovery word send by the MCU via the I2C bus.
- The FLGn signal stays low while the recovery word has not been sent The recovery word is described in next paragraph TCPP02-M18 VBUS analog current measurement and OCP DS13787 - Rev 4 page 13/27
Figure 9. Typical chronograms of TCPP02-M18 VBUS OCP
- It is signaled to the user by several ways: – I2C corresponding state bits are cleared (i.e. VCONN1_ACK = 0, VCONN2_ACK = 0…) – I2C relevant OCP flag is set (FLGn_OCP_VBUS is the OCP event coming from VBUS switch for example) – Failure flag pin (FLGn) is active (i.e. in LowZ state)
- After a delay of up to 40 µs, to recover, the below bit sequence has to be written and after recovery, the user can resume a start-up procedure:
Table 13. VBUS OCP recovery bit sequence table
7.6 VCONN OCP
- At start-up, a soft start sets the tripping current to about 590 mA during 512 µs min. (1ms max.)
- After this delay, the soft start is ended and the normal OCP threshold occurs (50 mA).
- If an OCP event occurs: – V CONN switches, CC switches and gate drivers are shutting down – During up to 40 µs typical, this OCP alarm is held (no recovery is possible) – After this delay, CC switches are turned ON but V CONN switches and gate drivers are held OFF. The system can be restarted only with a recovery word send by the MCU via the I2C bus. – The FLGn signal stays low as long as the recovery word has not been sent
Figure 10. VCONN OCP chronograms OCP threshold is set to 590 mA OCP threshold is set to 47mA typ. Table 14. VBUS OCP recovery bit sequence table
7.7 VCONN CC line OVP
7.7.1 CC lines short to VBUS
receptacle interface dimensions in USB Type-C cable and connector specification). be shorted to CC lines and apply a voltage higher than specified for CC lines. CC pins are usually 5 V tolerant I/Os on low voltage USB-PHY controllers. typical value) and FLGn pin goes to '0' state. When the OVP event disappears, the OVP on the CC line is turned-off and the FLGn pin goes back to 'Hi-Z' state.
7.8 VBUS discharge
VBUS discharge is activated via I2C bus and controlled via firmware by the USB-C power delivery controller. Table 15. Common source electrical parameters from USB-C specification
7.9 VCONN discharge
VCONN discharge is activated via I2C bus and controlled via firmware by the USB-C power delivery controller. Table 16. VCONN source characteristics from USB-C power delivery specification
- To avoid short-circuit, V CONN discharge cannot be activated if VCONN switch are closed
- The CCxc pin discharged is the last one acting as V CONN
7.10 OTP (over temperature protection)
Above 150°C typ., the OTP triggers the FLGn pin. OVP and OCP on VCONN, CC lines, VBUS are shut down. Auto recovery is ensured when the temperature goes back below OTP threshold.
8 Application example
8.1 X-NUCLEO-SRC1M1
The X-NUCLEO-SRC1M1 expansion board allows evaluating the features of the TCPP02-M18 for the USB Type-C™ and the protections for VBUS and CC lines suitable for source applications. Please refer to X-NUCLEO-SRC1M1 documentation (databrief, quick start guide, user manual, schematic and BOM) for detailed application usage of TCPP02-M18 and selection of external components.
8.2 STEVAL-2STPD01
The STEVAL-2STPD01 is an evaluation kit composed of an expansion board containing two Type-C ports and integrating two STPD01PUR programmable buck converters for USB Power Delivery, and the NUCLEO-G071RB STM32 Nucleo-64 development board. The expansion board has been specifically developed to be stacked on the NUCLEO-G071RB development board using the capability of its microcontroller to manage two UCPD peripherals at the same time. It also embeds the TCPP02-M18 USB Type-C port protection for Source applications and the L7983PU50R synchronous step-down switching regulator. Please refer to STEVAL-2STPD01documentation (databrief, quick start guide, user manual, schematic) for detailed USB-C PD with power sharing using TCPP02-M18.
8.3 PCB routing
When routing the TCPP02-M18, please respect the following recommendation:
- Place the circuit as close as possible to the USB-C connector in order to maximize the efficiency of the ESD protection for CC lines
- Place the ESD capacitor as close as possible to the TCPP02-M18 TCPP02-M18 Application example DS13787 - Rev 4 page 17/27
9 USB Type-C™ port protection (TCPP) comparison table
Table 17. Device comparison table
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 10.1 QFN18L 3.5x3.5 mm package information Figure 11. QFN18L 3.5x3.5 mm package outline
Package information
DS13787 - Rev 4 page 19/27
Table 18. QFN18L 3.5x3.5 mm mechanical data Figure 12. recommended footprint (dimensions are in mm)
Table 20. Ordering information
Ordering information
DS13787 - Rev 4 page 23/27
Revision history
Table 21. Document revision history 30-Aug-2021 1 Initial release. 04-Oct-2021 2 Updated Features, Table 6, Table 7 and Table 20. 09-May-2022 3 Added Section 8.1 and Section 8.2 . Updated Figure 4. 17-May-2022 4 Updated cover image and added Figure 18.
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Contents
DS13787 - Rev 4 page 27/27