N-channel 650 V, 0.024 typ., 88 A, MDmesh™ V Power MOSFET in a ISOTOP™ package
Document overview
- Manufacturer or author: STMICROELECTRONICS
- PDF pages: 14
Technical content
Datasheet sections
- 1 Electrical ratings
- 2 Electrical characteristics
- 2.1 Electrical characteristics (curves)
- 3 Test circuits
- 4 Package mechanical data
- 5 Revision history
Features
- Very low RDS(on)
- Higher VDSS rating
- Higher dv/dt capability
- Excellent switching performance
- 100% avalanche tested
Applications
- Switching applications
Description
This device is an N-channel MDmesh™ V Power MOSFET based on an innovative proprietary vertical process technology, which is combined with STMicroelectronics’ well-known PowerMESH™ horizontal layout structure. The resulting product has extremely low on- resistance, which is unmatched among silicon- based Power MOSFETs, making it especially suitable for applications which require superior power density and outstanding efficiency. ISOTOPTM $0Y Ć Order code V DS @Tjmax RDS(on) max I D STE88N65M5 710 V 0.029 Ω 88 A Table 1. Device summary
1 Electrical ratings
Table 2. Absolute maximum ratings
- Pulse width limited by safe operating area.
Table 3. Thermal data
2 Electrical characteristics
Table 4. On /off states Table 5. Dynamic
- C o(tr) is a constant capacitance value that gives the same charging time as C oss while VDS is rising from 0
- C o(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0
Table 6. Switching times Table 7. Source drain diode
- Pulse width limited by safe operating area.
- Pulsed: pulse duration = 300 μs, duty cycle 1.5%
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Normalized V(BR)DSS vs temperature Figure 7. Static drain-source on-resistance
Figure 14. Switching losses vs gate
- Eon including reverse recovery of a SiC diode.
3 Test circuits
Figure 15. Switching times test circuit for Figure 16. Gate charge test circuit Figure 17. Test circuit for inductive load Figure 18. Unclamped inductive load test circuit Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
Figure 21. ISOTOP drawing
Table 8. ISOTOP mechanical data
5 Revision history
Table 9. Document revision history 24-Feb-2014 1 Initial release.