STE48NM50

STE48NM50 STMICROELECTRONICS | Alldatasheet

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Technical content

N-CHANNEL 500V - 0.08Ω - 48A ISOTOP MDmesh™Power MOSFET /c110 TYPICAL R DS (on) = 0.08Ω /c110 HIGH dv/dt AND AVALANCHE CAPABILITIES /c110 100% AVALANCHE TESTED /c110 LOW INPUT CAPACITANCE AND GATE CHARGE /c110 LOW GATE INPUT RESISTANCE /c110 TIGHT PROCESS CONTROL AND HIGH MANUFACTURING YIELDS

DESCRIPTION

The MDmesh ™ is a new revolutionary MOSFET technology that associates the Multiple Drain pro- cess with the Company’s PowerMESH™ horizontal layout. The resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. The adoption of the Company’s proprietary strip technique yields overall dynamic performance that is significantly better than that of similar competition’s products.

APPLICATIONS

The MDmesh™ family is very suitable for increasing power density of high voltage converters allowing system miniaturization and higher efficiencies. ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE V DSS R DS(on) ID STE48NM50 500V < 0.1 Ω 48 A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 500 V VDGR Drain-gate Voltage (RGS = 20 kΩ ) 500 V VGS Gate- source Voltage ±30 V ID Drain Current (continuous) at TC = 25°C 48 A ID Drain Current (continuous) at TC = 100°C 30 A IDM (/c108 ) Drain Current (pulsed) 192 A PTOT Total Dissipation at TC = 25°C 450 W Derating Factor 3.6 W/°C dv/dt (1) Peak Diode Recovery voltage slope 15 V/ns Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature 150 °C (1) ISD ≤48A, di/dt ≤400A/µs, VDD ≤ V(BR)DSS , Tj ≤ TJMAX. ISOTOP INTERNAL SCHEMATIC DIAGRAM

(*) with conductive GREASE Applies AVALANCHE CHARACTERISTICS ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF ON (1) DYNAMIC Note: 1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. Rthj-case Thermal Resistance Junction-case Max 0.28 °C/W Rthc-sink (*) Thermal Resistance Case-sink Typ 0.05 °C/W Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 15 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR , VDD = 50 V) 810 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 500 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 10 µA VDS = Max Rating, TC = 125 °C 100 µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 30V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS = VGS , ID = 250µA 345V R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 24A 0.08 0.1 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (1) Forward Transconductance V DS > ID(on) x RDS(on)max, ID = 24A 20 S C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 3700 pF C oss Output Capacitance 610 pF C rss Reverse Transfer Capacitance 50 pF R G Gate Input Resistance f=1 MHz Gate DC Bias = 0 Test Signal Level = 20mV Open Drain 1.7 Ω

ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time VDD = 250V, ID = 24 A R G = 4.7Ω VGS = 10 V (see test circuit, Figure 3) 40 ns tr Rise Time 35 ns Q g Total Gate Charge VDD = 400 V, ID = 48 A, VGS = 10 V 87 117 nC Q gs Gate-Source Charge 23 nC Q gd Gate-Drain Charge 42 nC Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) Off-voltage Rise Time VDD = 400 V, ID = 48 A, R G = 4.7Ω, VGS = 10 V (see test circuit, Figure 5) 18 ns tf Fall Time 23 ns tc Cross-over Time 44 ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD Source-drain Current 48 A ISDM (2) Source-drain Current (pulsed) 192 A VSD (1) Forward On Voltage ISD = 48 A, VGS = 0 1.5 V trr Q rr Irrm Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 40 A, di/dt = 100A/µs, VDD = 100 V, Tj = 25°C (see test circuit, Figure 5) 520 7.8 ns µC A trr Q rr Irrm Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 40 A, di/dt = 100A/µs, VDD = 100 V, Tj = 150°C (see test circuit, Figure 5) 680 11.2 ns µC A Thermal ImpedenceSafe Operating Area

Gate Charge vs Gate-source Voltage Capacitance Variations Transconductance Static Drain-source On Resistance Output Characteristics Transfer Characteristics

Source-drain Diode Forward Characteristics Normalized On Resistance vs TemperatureNormalized Gate Thereshold Voltage vs Temp.

Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4: Gate Charge test Circuit Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuit For Resistive Load

DIM. mm inch A 11.8 12.2 0.466 0.480 B 8.9 9.1 0.350 0.358 C 1.95 2.05 0.076 0.080 D 0.75 0.85 0.029 0.033 E 12.6 12.8 0.496 0.503 F 25.15 25.5 0.990 1.003 G 31.5 31.7 1.240 1.248 H4 0 . 1 5 7 J 4.1 4.3 0.161 0.169 K 14.9 15.1 0.586 0.594 L 30.1 30.3 1.185 1.193 M 37.8 38.2 1.488 1.503 N4 0 . 1 5 7 O 7.8 8.2 0.307 0.322 B E H O N J K L M F A C G D ISOTOP MECHANICAL DATA

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