N-channel 800 V - 0.11Ω - 45 A ISOTOP SuperFREDmesh™ MOSFET

Document overview

  • Manufacturer or author: STMicroelectronics
  • PDF pages: 13

Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuit
  • 4 Package mechanical data
  • 5 Revision history

N-channel 800V - 0.11Ω - 45A ISOTOP SuperFREDmesh™ MOSFET General features ■ Extremely high dv/dt capability ■ 100% avalanche tested ■ Very low intrinsic capacitances ■ Very good manufacturing repeatibility

Description

The SuperFREDMesh™ series is obtained through an extreme optimization of ST’s well established strip-based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products.

Applications

■ Switching application Internal schematic diagram Type V DSS RDS(on) ID Pw STE45NK80ZD 800V <0.13 Ω 45A 600W ISOTOP Order codes Part number Marking Package Packaging STE45NK80ZD E45NK80ZD ISOTOP Tube Obsolete Product(s) - Obsolete Product(s)

1 Electrical ratings

Table 1. Absolute maximum ratings

  1. Pulse width limited by safe operating area

Table 2. Thermal data Table 3. Avalanche characteristics

2 Electrical characteristics

Table 4. On/off states Table 5. Dynamic

  1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
  2. Coss eq. is defined as a constant equivalent capacit ance giving the same charging time as Coss when VDS

increases from 0 to 80% VDSS.

2.1 Protection features of gate-to-source zener diodes

integrity. These integrated Zener diodes thus avoid the usage of external components. Table 6. Source drain diode

  1. Pulse width limited by safe operating area.
  2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.

Table 7. Gate-source zener diode

2.2 Electrical characterist ics (curves)

Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance

Figure 13. Avalanche energy vs starting Tj

3 Test circuit

Figure 14. Unclamped Inductive load test Figure 15. Unclamped inductive waveform Figure 16. Switching times test circuit for Figure 17. Gate charge test circuit Figure 18. Test circuit for inductive load

Obsolete Product(s) - Obsolete Product(s)

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com

Obsolete Product(s) - Obsolete Product(s) DIM. mm inch A 11.8 12.2 0.466 0.480 B 8.9 9.1 0.350 0.358 C 1.95 2.05 0.076 0.080 D 0.75 0.85 0.029 0.033 E 12.6 12.8 0.496 0.503 F 25.15 25.5 0.990 1.003 G 31.5 31.7 1.240 1.248 H4 0 . 1 5 7 J 4.1 4.3 0.161 0.169 K 14.9 15.1 0.586 0.594 L 30.1 30.3 1.185 1.193 M 37.8 38.2 1.488 1.503 N4 0 . 1 5 7 O 7.8 8.2 0.307 0.322 B E H O N J K L M F A C G D ISOTOP MECHANICAL DATA

5 Revision history

Table 8. Document revision history 29-Mar-2006 6 Modified value on Table 4.