STDS75 STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Summary description
  • 1.1 Serial communications
  • 1.2 Temperature sensor output
  • 1.3 Pin descriptions
  • 1.3.1 SDA (open drain)
  • 1.3.2 SCL
  • 1.3.3 OS /INT (open drain)
  • 1.3.4 GND
  • 1.3.5 A2, A1, A0
  • 2 Operation
  • 2.1 Applications information
  • 2.2 Thermal alarm function
  • 2.3 Comparator mode
  • 2.4 Interrupt mode
  • 2.5 Fault tolerance
  • 2.6 Shutdown mode
  • 2.7 Temperature data format
  • 3 Functional description
  • 3.1 Registers and register set formats
  • 3.1.1 Command/pointer register
  • 3.1.2 Configuration register
  • 3.1.3 Temperature register
  • 3.1.4 Over-limit temperature register (T
  • 3.1.5 Hysteresis temperature register (T HYS)
  • 3.2 Power-up default conditions
  • 3.3 Serial interface
  • 3.4.1 Bus not busy
  • 3.4.2 Start data transfer
  • 3.4.3 Stop data transfer

Features

■ Measures temperatures from –55°C to +125°C (–67°F to +257°F) – ±2°C Accuracy from –25°C to +100°C (max) ■ Low operating current: 125µA (typ) ■ No external components required ■ 2-wire I2C/SMBus-compatible serial interface – Selectable serial bus address allows connection of up to eight devices on the same bus ■ Thermometer resolution is user-configurable from 9 (Default) to 12 bits (0.5°C to 0.0625°C) ■ 9-bit conversion time is 150ms (max) ■ Programmable temperature threshold and hysteresis set points ■ Wide power supply range-operating voltage range: 2.7V to 5.5V ■ Pin- and software-compatible with DS75 (drop- in replacement) ■ Power up defaults permit stand-alone operation as thermostat ■ Shutdown mode to minimize power consumption ■ Separate open drain output pin operates as an interrupt or comparator/thermostat output (dual purpose event pin) ■ Packages: –S O 8 – MSOP8 (TSSOP8) (a) a. Contact local ST sales office for availability SO8 (M) MSOP8 (TSSOP8) (DS)

Table 9. T Table 16. MSOP8 (TSSOP8) – 8-lead, thin shrink small package (3mm x 3mm) outline mechanical data

Summary description STDS75

1 Summary description

The STDS75 is a high-precision CMOS (Digital) temperature sensor IC with a Delta-Sigma analog-to-digital (ADC) converter and an I2C-compatible serial digital interface (see Figure 1 on page 7). It is targeted for general applications such as personal computers, system thermal management, electronics equipment, and industrial controllers, and is packaged in the industry standard 8-lead TSSOP and SO8 packages (see Figure 2 on page 8). The device contains a band gap temperature sensor and programmable 9-to 12-bit ADC which monitor and digitize the temperature to a resolution up to 0.0625°C. The STDS75 is typically accurate to (±3°C - max) over the full temperature measurement range of –55°C to 125°C with ±2°C accuracy in the –25°C to +100°C range. At power-up, the STDS75 defaults to 9-bit resolution for software compatibility with the STLM75. STDS75 is specified for operating at supply voltages from 2.7V to 5.5V. Operating at 3.3V, the supply current is typically (125µA). The on-board delta sigma analog-to-digital converter (ADC) converts the measured temperature to a digital value that is calibrated in °C; for Fahrenheit applications a lookup table or conversion routine is required. The STDS75 is factory-calibrated and requires no external components to measure temperature.

1.1 Serial communications

The STDS75 has a simple 2-wire I2C-compatible digital serial interface which allows the user to access the data in the temperature register at any time. It communicates via the serial interface with a master controller which operates at speeds up to 400kHz. Three pins (A0, A1, and A2) are available for address selection, and enable the user to connect up to 8 devices on the same bus without address conflict. In addition, the serial interface gives the user easy access to all STDS75 registers to customize operation of the device.

1.2 Temperature sensor output

The STDS75 Temperature Sensor has a dedicated open drain Over-Limit Signal/Alert (OS /INT/Alert) output which features a thermal Alarm function. This function provides a user-programmable trip and turn-off temperature. It can operate in either of two selectable modes:

  • Comparator mode, and
  • Interrupt mode. At power-up the STDS75 comes up in 9-bit mode and immediately begins measuring the temperature and converting the temperature to a digital value. The resolution of the digital output data is user-configurable to 9, 10, 11, or 12 bits which correspond to temperature

OS/INT pin is activated (see Figure 3 on page 8). Figure 1. Logic diagram

  1. SDA and OS /INT are open drain.

Note: See Pin descriptions on page 9 for details. Note: See Pin descriptions on page 9 for details. Table 1. Signal names

  1. SDA and OS /INT are open drain.

2 SCL Input Serial clock input

4 GND Supply ground Ground

STDS75 Summary description

1.3 Pin descriptions

See Figure 1 on page 7 and Table 1 on page 7 for a brief overview of the signals connected to this device.

1.3.1 SDA (open drain)

This is the Serial Data Input/Output pin for the 2-wire serial communication port.

1.3.2 SCL

This is the Serial Clock Input pin for the 2-wire serial communication port.

1.3.3 OS /INT (open drain)

This is the Over-Limit Signal/Interrupt Alert Output pin. It is open drain, so it needs a pull-up resistor. Note: The open drain thermostat output that indicates if the temperature has exceeded user- programmable limits (Over/Under Temperature indicator).

1.3.4 GND

Ground; it is the reference for the power supply. It must be connected to system ground.

1.3.5 A2, A1, A0

A2, A1, and A0 are selectable address pins for the 3LSBs of the I2C interface address. They can be set to VDD or GND to provide 8 unique address selections.

1.3.6 V DD

This is the supply voltage pin, and ranges from +2.7V to +5.5V.

2 Operation

After each temperature measurement and analog-to-digital conversion, the STDS75 stores the temperature as a 16-bit two’s complement number in the 2-byte temperature register (see Table 8: Temperature register format). The most significant Bit (S, Bit 15) indicates if the temperature is positive or negative:

  • for positive numbers S = 0, and
  • for negative numbers S = 1. The most recently converted digital measurement can be read from the temperature register at any time. Since temperature conversions are performed in the background, reading the temperature register does not affect the operation in progress. Bits 3 through 0 of the temperature register are hardwired to logic '0.' When the STDS75 is configured for 12-bit resolution, the 12MSBs (Bits 15 through 4) of the temperature register will contain temperature data. For 11-bit resolution, the 11MSBs (Bits 15 through 5) of the temperature register will contain data, and Bit 4 will read out as logic '0.' For 10-bit resolution, the 10MSbs (Bits 15 through 6) will contain data, and for 9-bit resolution the 9MSbs (Bits 15 through 7) will contain data and all unused LSBs will contain '0s.' Table 3 on page 15 gives examples of 12-bit resolution digital output data and the corresponding temperatures. The data is compared to the values in the T OS and THYS registers, and then the OS/INT is updated based on the result of the comparison and the operating mode. The number of TOS and THYS bits used during the thermostat comparison is equal to the conversion resolution set by the FT1 and FT0 Bits in the Configuration register. For example, if the resolution is 9 bits, only the 9MSbs of T OS and THYS will be used by the thermostat comparator. The alarm fault tolerance is controlled by the FTI and FTO Bits in the Configuration register. They are used to set up a fault queue. This prevents false tripping of the OS /INT pin when the STDS75 is used in a noisy environment (see Table 2 on page 14). The active state of the OS/INT output can be changed via the Polarity (POL) Bit in the Configuration register. The power-up default is active-low. If the user does not wish to use the thermostat capabilities of the STDS75, the OS/INT output should be left floating. Note: If the thermostat is not used, the T OS and THYS registers can be used for general storage of system data.

2.1 Applications information

/INT outputs. A 0.1µF bypass capacitor is recommended. type of digital sensor is shown in Figure 4 on page 11.

  • System Thermal Management
  • Computers/Disk Drivers
  • Electronics/Test Equipment
  • Power Supply Modules
  • Consumer Products
  • Battery Management
  • FAX/Printers Management
  • Automotive

Figure 4. Typical 2-wire interface connection diagram

  1. SDA and OS /INT are open drain.

2.2 Thermal alarm function

The STDS75 thermal alarm function provides user-programmable thermostat capability and allows the STDS75 to function as a standalone thermostat without using the serial interface. The OS /INT output is the alarm output. This signal is an open drain output, and at power-up, this pin is configured with active-low polarity by default.

2.3 Comparator mode

In Comparator mode, each time a temperature-to-digital (T -to-D) temperature conversion occurs, the new digital temperature is compared to the value stored in the T OS and THYS registers. If a fault tolerance number of consecutive temperature measurements are greater than the value stored in the T OS register, the OS/INT output will be activated. For example, if the FT1 and FT0 Bits are equal to “10” (fault tolerance = 4), four consecutive temperature measurements must exceed TOS to activate the OS/INT output. Once the OS/INT output is active, it will remain active until the first time the measured temperature drops below the temperature stored in the THYS register. When the thermostat is in comparator mode, the OS/INT can be programmed to operate with any amount of hysteresis. The OS/INT output becomes active when the measured temperature exceeds the TOS value a consecutive number of times as defined by the FT1 and FT0 fault tolerance (FT) Bits in the configuration register. The OS/INT then stays active until the first time the temperature falls below the value stored in THYS. Putting the device into shutdown mode does not clear OS/INT in comparator mode.

2.4 Interrupt mode

Figure 5. OS output temperature response diagram

  1. This assumes that a READ has occurred.

Note: The STDS75 is configured to have a fault tolerance of 2 in this example.

2.5 Fault tolerance

alarm fault tolerance is controlled by the bits (Bits 4 and 3) in the Configuration Register.

2.6 Shutdown mode

mode, and writing a '0' to the SD Bit returns the STDS75 to normal operation. Table 2. Fault tolerance setting

2.7 Temperature data format

Configuration Register (see Table 7 on page 17). The default resolution is 9-bits. Table 3. Relationship between temperature and digital output

3 Functional description

user must “point” to the device register to be accessed.

  • Command Register/Address Pointer Register
  • Configuration Register
  • Temperature Register
  • Over-Limit Signal Temperature Register (TOS)
  • Hysteresis Temperature Register (THYS)

3.1 Registers and register set formats

3.1.1 Command/pointer register

'1' into any of these bits will cause the current operation to be terminated (see Table 4). register. All bits in the Command Register default to '0' at power-up. Table 4. Command/pointer register format

000000 P 1 P 0

Table 5. Register pointers selection summary

16 R/W 5000

3.1.2 Configuration register

mode, OS/INT Operation mode, OS/INT Polarity, and OS/INT Fault Queue. (see Table 6). The entire register is volatile and thus powers-up in its default state only. Table 6. Configuration register format

  1. Indicates Operation mode; 0 = Compar ator mode, and 1 = Interrupt mode (see Comparator mode on

page 12 and Interrupt mode on page 13).

  1. The OS /INT is active-low ('0').

Table 7. Programmable resolution configurations

3.1.3 Temperature register

updated upon the completion of the next A/D conversion that is not masked by a read cycle. will contain temperature data. All unused bits following the digital temperature will be zero. positive or negative. A '0' in Bit 15 is positive and a '1' is negative. Note: These are comparable formats to the DS75 and LM75.

3.1.4 Over-limit temperature register (T OS)

contains the temperature MSB. Table 8. Temperature register format

3.1.5 Hysteresis temperature register (T HYS)

Note: These are comparable formats to the DS75 and LM75.

3.2 Power-up default conditions

  • Thermostat mode = Comparator Mode
  • Polarity = Active-low
  • Fault tolerance = 1 fault (i.e., relevant bits set to '0' in the Configuration register)
  • TOS = 80°C
  • THYS = 75°C
  • Register pointer = 00 (Temperature register)
  • Conversion resolution = 9-bit (i.e., RC0 = 0 and RC1 = 0 in the Configuration register; see Table 7 on page 17) Note: After power-up these conditions can be reprogrammed via the serial interface.

3.3 Serial interface

generates the SCL signal which provides the clock signal for all other devices on the bus. (see Table 10). Both the master and slave devices can send and receive data on the bus. followed by an acknowledge (ACK) or not acknowledge (NACK) from the receiving device. connected to a positive supply voltage via a pull-up resistor.

  • The following protocol has been defined:
  • Data transfer may be initiated only when the bus is not busy.
  • During data transfer, the data line must remain stable whenever the clock line is High.
  • Changes in the data line, while the clock line is High, will be interpreted as control signals. Accordingly, the following bus conditions have been defined (see Figure 6 on page 21):

3.4.1 Bus not busy

Both data and clock lines remain High.

3.4.2 Start data transfer

3.4.3 Stop data transfer

Table 10. STDS75 serial bus slave addresses

3.4.4 Data valid

changed during the Low period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a start condition and terminated with a stop condition. The number of data bytes transferred between the start and stop conditions is not limited. The information is transmitted byte-wide and each receiver acknowledges with a ninth bit. Figure 6. Serial bus data transfer sequence

3.4.5 Acknowledge

Figure 7. Acknowledgement sequence

3.5 READ mode

word address 'An' is written to the on-chip address pointer.

  • Preset pointer locations (e.g. Temperature, TOS and THYS registers), and
  • Pointer setting (the pointer has to be set for the register that is to be read). Note: The Temperature register pointer is usually the default pointer. These modes are shown in the READ mode typical timing diagrams (see Figure 9, Figure 10, and Figure 11 on page 24).

Figure 8. Slave address location

Figure 9. Typical 2-byte READ from preset pointer location (e.g. temp - T OS, THYS) Figure 10. Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp) Figure 11. Typical 1-byte READ from the configuration register with preset pointer

001 A 2 A 1 A 0 W 000000 D 1 D 0

3.6 WRITE mode

is to be written to the on-chip address pointer. Figure 13, and Figure 14 on page 26). Figure 12. Typical pointer set followed by an Immediate READ from the Figure 13. Configuration register WRITE

001 A 2 A 1 A 0 W 000000 000 D 4 D 3 D 2 D 1 D 0 D1 D0

Figure 14. T OS and THYS WRITE

4 Typical operating characteristics

Figure 15. Temperature variation vs. voltage

5 Maximum rating

Program and other relevant quality documents. Table 11. Absolute maximum ratings

  1. Reflow at peak temperature of 255°C to 260°C for < 30 seconds (total thermal budget not to exceed 180°C

for between 90 to 150 seconds).

6 DC and AC parameters

Table 12. Operating and AC Measurement Conditions. Designers should check that the Table 12. Operating and AC measurement conditions

Table 13. DC and AC characteristics

  1. Valid for ambient operating temperature: T A = –55 to 125°C; VDD = 2.7V to 5.5V (except where noted).
  2. Typical number taken at VDD=3V, TA=25°

Figure 16. Bus timing requirements sequence Table 14. AC characteristics

  1. Valid for ambient operating temperature: T A = –55 to 125°C; VDD = 2.7V to 5.5V (except where noted).
  2. Transmitter must internally provide a hold time to bridge the undefined region (300ns max) of the falling

7 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

Figure 17. SO8 – 8-lead plastic small package outline Note: Drawing is not to scale. Table 15. SO8 – 8-lead plastic small outline package mechanical data

Figure 18. MSOP8 (TSSOP8) – 8-lead, thin shrink small package (3mm x 3mm) outline Note: Drawing is not to scale. Table 16. MSOP8 (TSSOP8) – 8-lead, thin shrink small package (3mm x 3mm) outline

8 Part numbering

Table 17. Ordering information scheme ST Sales Office nearest you.

  1. Contact ST sales office for availability

9 Revision history

Table 18. Document revision history 28-Nov-2005 1 Initial release. and Table 16); and part numbering (Table 17).