STD7NK40Z-1

STP7NK40Z STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

N-CHANNEL 400V-0.85 Ω -5.4A TO-220/TO-220FP/DPAK/IPAK Zener-Protected SuperMESH™Power MOSFET ■ TYPICAL R DS (on) = 0.85 Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED ■ GATE CHARGE MINIMIZED ■ VERY LOW INTRINSIC CAPACITANCES ■ VERY GOOD MANUFACTURING REPEATIBILITY

DESCRIPTION

The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip- based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is tak- en to ensure a very good dv/dt capability for the most demanding applications. Such series comple- ments ST full range of high voltage MOSFETs in- cluding revolutionary MDmesh™ products.

APPLICATIONS

■ HIGH CURRENT, HIGH SPEED SWITCHING ■ IDEAL FOR OFF-LINE POWER SUPPLIES, ADAPTORS AND PFC ■ LIGHTING

ORDERING INFORMATION

TYPE V DSS R DS(on) ID Pw STP7NK40Z STP7NK40ZFP STD7NK40Z STD7NK40Z-1 400 V 400 V 400 V 400 V < 1 Ω < 1 Ω < 1 Ω < 1 Ω 5.4 A 5.4 A 5.4 A 5.4 A 70 W 25 W 70 W 70 W SALES TYPE MARKING PACKAGE PACKAGING STP7NK40Z P7NK40Z TO-220 TUBE STP7NK40ZFP P7NK40ZFP TO-220FP TUBE STD7NK40ZT4 D7NK40Z DPAK TAPE & REEL STD7NK40Z-1 D7NK40Z IPAK TUBE TO-220 TO-220FP DPAK IPAK INTERNAL SCHEMATIC DIAGRAM

STP7NK40Z - STP7NK40ZFP - STD7NK40Z - STD7NK40Z-1 ABSOLUTE MAXIMUM RATINGS (/c108 ) Pulse width limited by safe operating area (1) ISD ≤5.4A, di/dt ≤200A/µs, VDD ≤ V(BR)DSS , Tj ≤ TJMAX. (*) Limited only by maximum temperature allowed THERMAL DATA AVALANCHE CHARACTERISTICS GATE-SOURCE ZENER DIODE PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. Symbol Parameter Value Unit STP7NK40Z STP7NK40ZFP STD7NK40Z STD7NK40Z-1 VDS Drain-source Voltage (VGS = 0) 400 V VDGR Drain-gate Voltage (RGS = 20 kΩ ) 400 V VGS Gate- source Voltage ± 30 V ID Drain Current (continuous) at TC = 25°C 5.4 5.4 (*) 5.4 A ID Drain Current (continuous) at TC = 100°C 3.4 3.4 (*) 3.4 A IDM (/c108 ) Drain Current (pulsed) 21.6 21.6 (*) 21.6 A PTOT Total Dissipation at TC = 25°C 70 25 70 W Derating Factor 0.56 0.2 0.56 W/°C VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ) 3000 V dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns VISO Insulation Withstand Voltage (DC) - 2500 - V Tj Tstg Operating Junction Temperature Storage Temperature -55 to 150 -55 to 150 TO-220 TO-220FP DPAK IPAK Rthj-case Thermal Resistance Junction-case Max 1.78 5 1.78 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 100 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 5.4 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR , VDD = 50 V) 130 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit BV GSO Gate-Source Breakdown Voltage Igs=± 1mA (Open Drain) 30 V

STP7NK40Z - STP7NK40ZFP - STD7NK40Z - STD7NK40Z-1 ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF DYNAMIC SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS . Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID =1 mA, VGS = 0 400 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating, TC = 125 °C µA µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20V ±10 µA VGS(th) Gate Threshold Voltage VDS = VGS , ID = 50µA 3 3.75 4.5 V R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 2.7 A 0.85 1 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (1) Forward Transconductance V DS =15 V, ID = 2.7 A 3.5 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25V, f = 1 MHz, VGS = 0 535 pF pF pF C oss eq. (3) Equivalent Output Capacitance VGS = 0V, VDS = 0V to 400V 53 pF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 200 V, ID = 2.7 A R G = 4.7Ω VGS = 10 V (Resistive Load see, Figure 3) ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 320V, ID = 5.4 A, VGS = 10V 26 nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit t d(off) tf Turn-off Delay Time Fall Time VDD = 200 V, ID = 2.7A R G =4 . 7Ω VGS = 10 V (Resistive Load see, Figure 3) ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time VDD = 320V, ID = 5.4A, R G =4 . 7Ω, VGS = 10V (Inductive Load see, Figure 5) ns ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit I SD ISDM (2) Source-drain Current Source-drain Current (pulsed) 5.4 21.6 A A VSD (1) Forward On Voltage ISD = 5.4 A, VGS = 0 1.6 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 5.4 A, di/dt = 100A/µs VDD = 50V, Tj = 150°C (see test circuit, Figure 5) 220 990 ns nC A

STP7NK40Z - STP7NK40ZFP - STD7NK40Z - STD7NK40Z-1 Transfer CharacteristicsOutput Characteristics Thermal Impedance For TO-220/DPAK/IPAK Safe Operating Area For TO-220FPSafe Operating Area For TO-220/DPAK/IPAK Thermal Impedance For TO-220FP

STP7NK40Z - STP7NK40ZFP - STD7NK40Z - STD7NK40Z-1 Normalized On Resistance vs TemperatureNormalized Gate Threshold Voltage vs Temp. Capacitance VariationsGate Charge vs Gate-source Voltage Static Drain-source On ResistanceTransconductance

STP7NK40Z - STP7NK40ZFP - STD7NK40Z - STD7NK40Z-1 Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature Maximum Avalanche Energy vs Temperature

STP7NK40Z - STP7NK40ZFP - STD7NK40Z - STD7NK40Z-1 Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4: Gate Charge test Circuit Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuit For Resistive Load

STP7NK40Z - STP7NK40ZFP - STD7NK40Z - STD7NK40Z-1 DIM. mm inch A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 D1 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 A C D E F G Dia. TO-220 MECHANICAL DATA P011C

STP7NK40Z - STP7NK40ZFP - STD7NK40Z - STD7NK40Z-1 A B D E H G ¯ F 123F2 L4L5 DIM. mm. inch A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.5 0.045 0.067 F2 1.15 1.5 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 TO-220FP MECHANICAL DATA

STP7NK40Z - STP7NK40ZFP - STD7NK40Z - STD7NK40Z-1 DIM. mm inch A 2.20 2.40 0.087 0.094 A1 0.90 1.10 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.90 0.025 0.035 B2 5.20 5.40 0.204 0.213 C 0.45 0.60 0.018 0.024 C2 0.48 0.60 0.019 0.024 D 6.00 6.20 0.236 0.244 E 6.40 6.60 0.252 0.260 G 4.40 4.60 0.173 0.181 H 9.35 10.10 0.368 0.398 L2 0.8 0.031 L4 0.60 1.00 0.024 0.039 V2 0 o 8o 0o 0o P032P_B TO-252 (DPAK) MECHANICAL DATA

STP7NK40Z - STP7NK40ZFP - STD7NK40Z - STD7NK40Z-1 DIM. mm inch A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 0.85 0.033 B5 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 0.047 L2 0.8 1 0.031 0.039 A C H D LL2 1 3 = = B E G = = = = TO-251 (IPAK) MECHANICAL DATA 0068771-E

STP7NK40Z - STP7NK40ZFP - STD7NK40Z - STD7NK40Z-1 TAPE AND REEL SHIPMENT (suffix ”T4”)* TUBE SHIPMENT (no suffix)* DPAK FOOTPRINT * on sales type DIM. mm inch MIN. MAX. MIN. MAX. A 330 12.992 B 1.5 0.059 C 12.8 13.2 0.504 0.520 D 20.2 0.795 G 16.4 18.4 0.645 0.724 N 50 1.968 T 22.4 0.881 BASE QTY BULK QTY 2500 2500 REEL MECHANICAL DATA DIM. mm inch MIN. MAX. MIN. MAX. A0 6.8 7 0.267 0.275 B0 10.4 10.6 0.409 0.417 B1 12.1 0.476 D 1.5 1.6 0.059 0.063 D1 1.5 0.059 E 1.65 1.85 0.065 0.073 F 7.4 7.6 0.291 0.299 K0 2.55 2.75 0.100 0.108 P0 3.9 4.1 0.153 0.161 P1 7.9 8.1 0.311 0.319 P2 1.9 2.1 0.075 0.082 R 40 1.574 W 15.7 16.3 0.618 0.641 TAPE MECHANICAL DATA All dimensions are in millimetersAll dimensions are in millimeters

STP7NK40Z - STP7NK40ZFP - STD7NK40Z - STD7NK40Z-1 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com