STD7NB20 STMICROELECTRONICS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 10

Technical content

N-CHANNEL 200V - 0.3Ω - 7A DPAK/IPAK PowerMESH™ MOSFET ■ TYPICAL R DS (on) = 0.3 Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED ■ VERY LOW INTRINSIC CAPACITANCES ■ GATE CHARGE MINIMIZED ■ ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL

DESCRIPTION

Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an ad- vanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprieraty edge termi- nation structure, gives the lowest R DS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteris- tics.

APPLICATIONS

■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-DC CONVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE V DSS R DS(on) ID STD7NB20 STD7NB20-1 200 V 200 V < 0.40 Ω < 0.40 Ω 7 A 7 A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 200 V VDGR Drain-gate Voltage (RGS = 20 kΩ ) 200 V VGS Gate- source Voltage ± 30 V ID Drain Current (continuos) at TC = 25°C 7A ID Drain Current (continuos) at TC = 100°C 5A IDM (/c108 ) Drain Current (pulsed) 28 A PTOT Total Dissipation at TC = 25°C 55 W Derating Factor 0.44 W/°C dv/dt (1) Peak Diode Recovery voltage slope 5.5 V/ns Tstg Storage Temperature – 65 to 150 °C Tj Max. Operating Junction Temperature 150 °C (1) ISD ≤ 7A, di/dt≤200 A/µs, VDD ≤ V(BR)DSS , Tj≤TjMAX INTERNAL SCHEMATIC DIAGRAM TO-252 DPAK IPAK TO-251

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF ON (1) DYNAMIC Rthj-case Thermal Resistance Junction-case Max 2.27 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W Tl Maximum Lead Temperature For Soldering Purpose 275 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR , VDD = 50 V) 100 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 200 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1µ A VDS = Max Rating, TC = 125 °C 10 µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 30V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS = VGS , ID = 250µA 345V R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 3.5 A 0.30 0.40 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (1) Forward Transconductance V DS > ID(on) x RDS(on)max, ID = 3.5 A 23 S C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 470 650 pF C oss Output Capacitance 135 190 pF C rss Reverse Transfer Capacitance 22 30 pF

ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time VDD = 100 V, ID = 5 A R G = 4.7Ω VGS = 10 V (see test circuit, Figure 3) 10 14 ns tr Rise Time 15 20 ns Q g Total Gate Charge VDD = 160V, ID = 10 A, VGS = 10V 17 24 nC Q gs Gate-Source Charge 7.5 nC Q gd Gate-Drain Charge 5.5 nC Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) tf tc Off-Voltage Rise Time Fall Time Cross-over Time V DD = 160V, ID = 10 A, R G =4 . 7Ω, VGS = 10V (see test circuit, Figure 3) ns ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit I SD Source-drain Current 7 A ISDM (2) Source-drain Current (pulsed) 28 A VSD (1) Forward On Voltage ISD = 7 A, VGS = 0 1.5 V trr Reverse Recovery Time ISD = 10 A, di/dt = 100A/µs VDD = 50V, Tj = 150°C (see test circuit, Figure 5) 170 ns Q rr Reverse Recovery Charge 980 nC IRRM Reverse Recovery Current 11.5 A Safe Operating Area

Transconductance Static Drain-source On Resistance Transfer CharacteristicsOutput Characteristics Gate Charge vs Gate-source Voltage

Source-drain Diode Forward Characteristics Normalized On Resistance vs TemperatureNormalized Gate Threshold Voltage vs Temp.

Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4: Gate Charge test Circuit Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuit For Resistive Load

DIM. mm. inch A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 D1 8 0.315 E 10 10.4 0.393 E1 8.5 0.334 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.625 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 M 2.4 3.2 0.094 0.126 R 0.4 0.015 V2 0 º8 º D 2PAK MECHANICAL DATA

DIM. mm inch A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 0.85 0.033 B5 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 0.047 L2 0.8 1 0.031 0.039 A C H D LL2 1 3 = = B E G = = = = TO-251 (IPAK) MECHANICAL DATA 0068771-E

TAPE AND REEL SHIPMENT (suffix ”T4”)* TUBE SHIPMENT (no suffix)* DPAK FOOTPRINT * on sales type DIM. mm inch MIN. MAX. MIN. MAX. A 330 12.992 B 1.5 0.059 C 12.8 13.2 0.504 0.520 D 20.2 0.795 G 16.4 18.4 0.645 0.724 N 50 1.968 T 22.4 0.881 BASE QTY BULK QTY 2500 2500 REEL MECHANICAL DATA DIM. mm inch MIN. MAX. MIN. MAX. A0 6.8 7 0.267 0.275 B0 10.4 10.6 0.409 0.417 B1 12.1 0.476 D 1.5 1.6 0.059 0.063 D1 1.5 0.059 E 1.65 1.85 0.065 0.073 F 7.4 7.6 0.291 0.299 K0 2.55 2.75 0.100 0.108 P0 3.9 4.1 0.153 0.161 P1 7.9 8.1 0.311 0.319 P2 1.9 2.1 0.075 0.082 R 40 1.574 W 15.7 16.3 0.618 0.641 TAPE MECHANICAL DATA All dimensions are in millimetersAll dimensions are in millimeters

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com