STD7N90K5 STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package information
  • 4.1 DPAK type A2 package information
  • 4.2 DPAK (TO-252) packing information
  • 5 Revision history

Features

Order code VDS RDS(on) max. ID STD7N90K5 900 V 0.81 Ω 7 A  Industry’s lowest RDS(on) x area  Industry’s best FoM (figure of merit)  Ultra-low gate charge  100% avalanche tested  Zener-protected

Applications

 Switching applications

Description

This very high voltage N-channel Power MOSFET is designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Table 1: Device summary Order code Marking Package Packing STD7N90K5 7N90K5 DPAK Tape and reel

1 Electrical ratings

Table 2: Absolute maximum ratings Symbol Parameter Value Unit VGS Gate-source voltage ± 30 V ID Drain current (continuous) at TC = 25 °C 7 A ID Drain current (continuous) at TC = 100 °C 4.4 A ID(1) Drain current (pulsed) 28 A PTOT Total dissipation at TC = 25 °C 90 W dv/dt (2) Peak diode recovery voltage slope 4.5 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 Tj Operating junction temperature range - 55 to 150 °C Tstg Storage temperature range Notes: (1)Pulse width limited by safe operating area (2)ISD ≤ 7 A, di/dt ≤ 100 A/μs; VDS peak < V(BR)DSS, VDD = 450 V (3)VDS ≤ 720 V Table 3: Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case 1.38 °C/W Rthj-pcb(1) Thermal resistance junction-ambient 50 °C/W Notes: (1)When mounted on 1 inch² FR-4 board, 2 oz Cu. Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax) 2.4 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 230 mJ

2 Electrical characteristics

TC = 25 °C unless otherwise specified Table 5: On/off-state Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 1 mA 900 V IDSS Zero gate voltage drain current VGS = 0 V, VDS = 900 V 1 µA VGS = 0 V, VDS = 900 V TC = 125 °C(1) 50 µA IGSS Gate body leakage current VDS = 0 V, VGS = ±20 V ±10 µA VGS(th) Gate threshold voltage VDD = VGS, ID = 100 µA 3 4 5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 3.5 A 0.72 0.81 Ω Notes: (1)Defined by design, not subject to production test. Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V - 425 - pF Coss Output capacitance - 41 - pF Crss Reverse transfer capacitance - 1.2 - pF Co(tr)(1) Equivalent capacitance time related VGS = 0, VDS = 0 to 720 V - 64 - pF Co(er)(2) Equivalent capacitance energy related pF Rg Intrinsic gate resistance f = 1 MHz , ID = 0 A - 6.7 - Ω Qg Total gate charge VDD = 720 V, ID = 7 A VGS = 10 V (see Figure 15: "Test circuit for gate charge behavior") - 17.7 - nC Qgs Gate-source charge - 3.1 - nC Qgd Gate-drain charge - 13 - nC Notes: (1)Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. (2)Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS.

Table 7: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD= 450 V, ID = 3.5 A, RG = 4.7 Ω VGS = 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform") - 13.2 - ns tr Rise time - 14.2 - ns td(off) Turn-off delay time - 31.6 - ns tf Fall time - 14.7 - ns Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 7 A ISDM(1) Source-drain current (pulsed) - 28 A VSD(2) Forward on voltage ISD = 7 A, VGS = 0 V - 1.5 V trr Reverse recovery time ISD = 7 A, di/dt = 100 A/µs,VDD = 60 V (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 352 ns Qrr Reverse recovery charge - 3.63 µC IRRM Reverse recovery current - 20.6 A trr Reverse recovery time ISD = 7 A, di/dt = 100 A/µs VDD = 60 V, Tj = 150 °C (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 525 ns Qrr Reverse recovery charge - 4.94 µC IRRM Reverse recovery current - 18.8 A Notes: (1)Pulse width limited by safe operating area (2)Pulsed: pulse duration = 300 µs, duty cycle 1.5% Table 9: Gate-source Zener diode Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)GSO Gate-source breakdown voltage IGS= ± 1mA, ID= 0 A ±30 - - V The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry.

2.1 Electrical characteristics (curves)

Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance

3 Test circuits

Figure 14: Test circuit for resistive load switching times Figure 15: Test circuit for gate charge behavior Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform AM01469v10 47 kΩ 2.7 kΩ 1 kΩ IG= CONST 100 Ω D.U.T. +pulse width VGS 2200 μF VG VDD RL

4 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

4.1 DPAK type A2 package information

Figure 20: DPAK (TO-252) type A2 package outline 0068772_type-A2_rev21

Table 10: DPAK (TO-252) type A2 mechanical data Dim. mm Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 5.10 5.25 E 6.40 6.60 E1 5.10 5.20 5.30 e 2.16 2.28 2.40 e1 4.40 4.60 H 9.35 10.10 L 1.00 1.50 L1 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 1.00 R 0.20 V2 0°

Figure 21: DPAK (TO-252) type A2 recommended footprint (dimensions are in mm)

4.2 DPAK (TO-252) packing information

Figure 22: DPAK (TO-252) tape outline

Figure 23: DPAK (TO-252) reel outline Table 11: DPAK (TO-252) tape and reel mechanical data Tape Reel Dim. mm Dim. mm Min. Max. Min. Max. A0 6.8 7 A 330 B0 10.4 10.6 B 1.5 12.1 C 12.8 13.2 D 1.5 1.6 D 20.2 D1 1.5 G 16.4 18.4 E 1.65 1.85 N 50 F 7.4 7.6 T 22.4 K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3

5 Revision history

Table 12: Document revision history Date Revision Changes 17-Oct-2016 1 First release.