STD7N60M2 STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package mechanical data
  • 5 Packaging mechanical data
  • 6 Revision history

Features

  • Extremely low gate charge
  • Lower RDS(on) x area vs previous generation
  • Low gate input resistance
  • 100% avalanche tested
  • Zener-protected

Applications

  • Switching applications

Description

These devices are N-channel Power MOSFETs developed using a new generation of MDmesh™ technology: MDmesh II Plus™ low Q g. These revolutionary Power MOSFETs associate a vertical structure to the company's strip layout to yield one of the world's lowest on-resistance and gate charge. They are therefore suitable for the most demanding high efficiency converters. TO-220 1 2 TAB TAB DPAK TAB IPAK AM15572v1 , TAB Order codes VDS @ TJmax RDS(on) max ID STD7N60M2 650 V 0.95 Ω 5 ASTP7N60M2 STU7N60M2 Table 1. Device summary

1 Electrical ratings

Table 2. Absolute maximum ratings Table 3. Thermal data

  1. When mounted on 1 inch² FR-4, 2 Oz copper board

Table 4. Avalanche characteristics

2 Electrical characteristics

Table 5. On /off states Table 6. Dynamic

  1. C oss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when VDS

Table 7. Switching times

Table 8. Source drain diode

  1. Pulse width limited by safe operating area.
  2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area for DPAK and Figure 3. Thermal impedance for DPAK and Figure 4. Safe operating area for TO-220 Figure 5. Thermal impedance for TO-220 Figure 6. Output characteristics Figure 7. Transfer characteristics

Figure 8. Gate charge vs gate-source voltage Figure 9. Static drain-source on-resistance Figure 10. Capacitance variations Figure 11. Output capacitance stored energy Figure 12. Normalized gate threshold voltage Figure 13. Normalized on-resistance vs.

0 VDS(V)

3 Test circuits

Figure 16. Switching times test circuit for Figure 17. Gate charge test circuit Figure 18. Test circuit for inductive load Figure 19. Unclamped inductive load test circuit Figure 20. Unclamped inductive waveform Figure 21. Switching time waveform

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

Table 9. DPAK (TO-252) mechanical data

Figure 22. DPAK (TO-252) drawing

Figure 23. DPAK footprint (a)

Table 10. TO-220 type A mechanical data

Figure 24. TO-220 type A drawing

Table 11. IPAK (TO-251) mechanical data

Figure 25. IPAK (TO-251) drawing

5 Packaging mechanical data

Table 12. DPAK (TO-252) tape and reel mechanical data

6 Revision history

Table 13. Document revision history 06-Jun-2013 1 First release.