STB7ANM60N STMICROELECTRONICS | Alldatasheet

Document overview

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  • PDF pages: 20

Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package mechanical data
  • 5 Packaging mechanical data
  • 6 Revision history

Features

  • Designed for automotive applications and AEC-Q101 qualified
  • 100% avalanche tested
  • Low input capacitance and gate charge
  • Low gate input resistance

Applications

  • Switching applications

Description

These devices are N-channel Power MOSFETs developed using the second generation of MDmesh™ technology. This revolutionary Power MOSFET associates a vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. DPAK TAB TAB D PAK2 $0Y Ć7$% Order codes V DS @ Tjmax RDS(on) max. I D STB7ANM60N 650 V 0.9 Ω 5 A STD7ANM60N Table 1. Device summary

1 Electrical ratings

Table 2. Absolute maximum ratings

  1. Pulse width limited by safe operating area
  2. I SD ≤ 5 A, di/dt ≤ 400 A/μs, VDD = 80% V(BR)DSS, VDS(Peak) < V(BR)DSS

Table 3. Thermal data

  1. When mounted on 1 inch² FR-4 board, 2oz Cu

Table 4. Thermal data

2 Electrical characteristics

Table 5. On /off states Table 6. Dynamic

  1. C oss eq. is defined as a constant equivalent capac itance giving the same charging time as C oss when VDS

increases from 0 to 80% VDS. Table 7. Switching times

Table 8. Source drain diode

  1. Pulse width limited by safe operating area
  2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area for D2PAK Figure 3. Thermal impedance for D 2PAK Figure 4. Safe operating area for DPAK Figure 5. Thermal impedance for DPAK Figure 6. Output characteristics Figure 7. Transfer characteristics

Figure 14. Normalized VDS vs temperature

3 Test circuits

Figure 15. Switching times test circuit for Figure 16. Gate charge test circuit Figure 17. Test circuit for inductive load Figure 18. Unclamped inductive load test circuit Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

Table 9. D²PAK (TO-263) mechanical data

Table 10. DPAK (TO-252) type A mechanical data

Figure 23. DPAK (TO-252) type A drawing

Figure 24. DPAK (TO-252) type A footprint (b)

5 Packaging mechanical data

Table 11. D²PAK (TO-263) tape and reel mechanical data Table 12. DPAK (TO-252) tape and reel mechanical data

Figure 25. Tape Table 12. DPAK (TO-252) tape and reel mechanical data (continued)

Figure 26. Reel

6 Revision history

Table 13. Document revision history