STD60NF3LL_06 TI | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 13
Technical content
Datasheet sections
- 1 Electrical ratings
- 2 Electrical characteristics
- 2.1 Electrical characteristics (curves)
- 3 Test circuit
- 4 Package mechanical data
- 5 Packing mechanical data
- 6 Revision history
N-channel 30V - 0.0075Ω - 60A - DPAK STripFET™ II Power MOSFET General features ■ Optimal RDS(ON) x Qg trade-off @ 4.5V ■ Conduction losses reduced ■ Switching losses reduced
Description
This application specific Power MOSFET is the third genaration of STMicroelectronics unique “Single Feature Size™” strip-based process. The resulting transistor shows the best trade-off between on-resistance ang gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance.
Applications
■ Switching application Internal schematic diagram Type V DSS RDS(on) ID STD60NF3LL 60V <0.0095 Ω 60A DPAK Order codes Part number Marking Package Packaging STD60NF3LLT4 D60NF3LL DPAK Tape & reel
1 Electrical ratings
Table 1. Absolute maximum ratings
- Pulse width limited by safe operating area.
- Starting Tj=25°C, I D=30A, VDD=27.5V
Table 2. Thermal data
2 Electrical characteristics
Table 3. On/off states Table 4. Dynamic
- Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
Table 5. Source drain diode
- Pulse width limited by safe operating area.
- Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
2.1 Electrical characteri stics (curves)
Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance
3 Test circuit
Figure 12. Switching times test circuit for Figure 13. Gate charge test circuit Figure 14. Test circuit for inductive load Figure 15. Unclamped Inductive load test Figure 16. Unclamped inductive wavefo rm Figure 17. Switching time waveform
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
DIM. mm. inch A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.9 0.025 0.035 b4 5.2 5.4 0.204 0.212 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 D1 5.1 0.200 E 6.4 6.6 0.252 0.260 E1 4.7 0.185 e 2.28 0.090 e1 4.4 4.6 0.173 0.181 H 9.35 10.1 0.368 0.397 L 1 0.039 (L1) 2.8 0.110 L2 0.8 0.031 L4 0.6 1 0.023 0.039 R 0.2 0.008 V2 0° 8° 0° 8° DPAK MECHANICAL DATA 0068772-F
STD60NF3LL Packing mechanical data
5 Packing mechanical data
DIM. mm inch MIN. MAX. MIN. MAX. A 330 12.992 B 1.5 0.059 C 12.8 13.2 0.504 0.520 D 20.2 0.795 G 16.4 18.4 0.645 0.724 N 50 1.968 T 22.4 0.881 BASE QTY BULK QTY 2500 2500 REEL MECHANICAL DATA DIM. mm inch MIN. MAX. MIN. MAX. A0 6.8 7 0.267 0.275 B0 10.4 10.6 0.409 0.417 B1 12.1 0.476 D 1.5 1.6 0.059 0.063 D1 1.5 0.059 E 1.65 1.85 0.065 0.073 F 7.4 7.6 0.291 0.299 K0 2.55 2.75 0.100 0.108 P0 3.9 4.1 0.153 0.161 P1 7.9 8.1 0.311 0.319 P2 1.9 2.1 0.075 0.082 R 40 1.574 W 15.7 16.3 0.618 0.641 TAPE MECHANICAL DATA All dimensions are in millimeters
6 Revision history
Table 6. Revision history