STD60NF3LL

STD60NF3LL STMICROELECTRONICS | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 9

Technical content

N-CHANNEL 30V - 0.0075Ω - 60A DPAK STripFET™ II POWER MOSFET (1) Starting Tj=25°C, ID =30A, VDD =27.5V ■ TYPICAL R DS (on) = 0.0075Ω ■ OPTIMAL RDS(ON) x Qg TRADE-OFF @ 4.5V ■ CONDUCTION LOSSES REDUCED ■ SWITCHING LOSSES REDUCED ■ ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL

DESCRIPTION

This application specific Power Mosfet is the third genaration of STMicroelectronics unique “Single Feature Size™” strip-based process. The result- ing transistor shows the best trade-off between on- resistance ang gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high effi- ciency are of paramount importance.

APPLICATIONS

■ SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY DC/DC CONVERTERS ABSOLUTE MAXIMUM RATINGS (● ) Pulse width limited by safe operating area TYPE V DSS R DS(on) ID STD60NF3LL 30V <0.0095 Ω 60A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 30 V VDGR Drain-gate Voltage (RGS = 20 kΩ ) 30 V VGS Gate- source Voltage ± 16 V ID Drain Current (continuos) at TC = 25°C 60 A ID Drain Current (continuos) at TC = 100°C 43 A IDM (/c108 ) Drain Current (pulsed) 240 A PTOT Total Dissipation at TC = 25°C 100 W Derating Factor 0.67 W/°C EAS (1) Single Pulse Avalanche Energy 700 mJ Tstg Storage Temperature – 55 to 175 °C Tj Operating Junction Temperature DPAK TO-252 INTERNAL SCHEMATIC DIAGRAM

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF ON (1) DYNAMIC Rthj-case Thermal Resistance Junction-case Max 1.5 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 30 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1µ A VDS = Max Rating, TC = 125 °C 10 µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 16V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS = VGS , ID = 250µA 1V R DS(on) Static Drain-source On Resistance VGS = 10 V, ID = 30 A VGS = 4.5 V , ID = 30 A 0.0075 0.0085 0.0095 0.0105 Ω Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (1) Forward Transconductance V DS =15 V, ID =30 A 30 S C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 2210 pF C oss Output Capacitance 635 pF C rss Reverse Transfer Capacitance 138 pF

ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time VDD = 15V, ID = 30A R G = 4.7Ω VGS = 4.5V (see test circuit, Figure 3) 22 ns tr Rise Time 130 ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 24V, ID = 60A, VGS = 4.5V 12.5 40 nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off-Delay Time Fall Time VDD = 15V, ID = 30A, R G =4 . 7Ω, VGS = 4.5V (see test circuit, Figure 3) 36.5 36.5 ns ns td(off) tf tc Off-voltage Rise Time Fall Time Cross-over Time Vclamp =24V, ID =30A R G =4 . 7Ω, VGS = 4.5V (see test circuit, Figure 5) ns ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD Source-drain Current 60 A ISDM (1) Source-drain Current (pulsed) 240 A VSD (2) Forward On Voltage ISD = 60A, VGS = 0 1.2 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 60A, di/dt = 100A/µs, VDD = 15V, Tj = 150°C (see test circuit, Figure 5) 105 3.4 ns nC A Thermal ImpedenceSafe Operating Area

Gate Charge vs Gate-source Voltage Capacitance Variations Transconductance Static Drain-source On Resistance Output Characteristics

Source-drain Diode Forward Characteristics Normalized On Resistance vs TemperatureNormalized Gate Thereshold Voltage vs Temp.

Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4: Gate Charge test Circuit Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit Fig. 3: Switching Times Test Circuit For Resistive Load

DIM. mm inch A 2.20 2.40 0.087 0.094 A1 0.90 1.10 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.90 0.025 0.035 B2 5.20 5.40 0.204 0.213 C 0.45 0.60 0.018 0.024 C2 0.48 0.60 0.019 0.024 D 6.00 6.20 0.236 0.244 E 6.40 6.60 0.252 0.260 G 4.40 4.60 0.173 0.181 H 9.35 10.10 0.368 0.398 L2 0.8 0.031 L4 0.60 1.00 0.024 0.039 V2 0 o 8o 0o 0o P032P_B TO-252 (DPAK) MECHANICAL DATA

TAPE AND REEL SHIPMENT (suffix ”T4”)* TUBE SHIPMENT (no suffix)* DPAK FOOTPRINT * on sales type DIM. mm inch MIN. MAX. MIN. MAX. A 330 12.992 B 1.5 0.059 C 12.8 13.2 0.504 0.520 D 20.2 0.795 G 16.4 18.4 0.645 0.724 N 50 1.968 T 22.4 0.881 BASE QTY BULK QTY 2500 2500 REEL MECHANICAL DATA DIM. mm inch MIN. MAX. MIN. MAX. A0 6.8 7 0.267 0.275 B0 10.4 10.6 0.409 0.417 B1 12.1 0.476 D 1.5 1.6 0.059 0.063 D1 1.5 0.059 E 1.65 1.85 0.065 0.073 F 7.4 7.6 0.291 0.299 K0 2.55 2.75 0.100 0.108 P0 3.9 4.1 0.153 0.161 P1 7.9 8.1 0.311 0.319 P2 1.9 2.1 0.075 0.082 R 40 1.574 W 15.7 16.3 0.618 0.641 TAPE MECHANICAL DATA All dimensions are in millimetersAll dimensions are in millimeters

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com