STD5NM60 STMICROELECTRONICS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 6

Technical content

N-CHANNEL 600V - 0.8Ω - 5A DPAK MDmesh  Power MOSFET n TYPICAL R DS (on) = 0.8Ω n HIGH dv/dt AND AVALANCHE CAPABILITIES n 100% AVALANCHE TESTED n LOW INPUT CAPACITANCE AND GATE CHARGE n LOW GATE INPUT RESISTANCE n TIGHT PROCESS CONTROL AND HIGH MANUFACTORING YIELDS

DESCRIPTION

The MDmesh  is a new revolutionary MOSFET technology that associates the Multiple Drain pro- cess with the Company’s PowerMESH horizontal layout. The resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. The adoption of the Company’s proprietary strip technique yields overall dynamic performance that is significantly better than that of similar completition’s products.

APPLICATIONS

The MDmesh  family is very suitable for increase the power density of high voltage converters allow- ing system miniaturization and higher efficiencies. ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area (1)ISD <5A, di/dt<200A/µs, VDD <V (BR)DSS ,TJ<TJMAX TYPE V DSS R DS(on) ID STD5NM60 600V <0.9 Ω 5A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 600 V VDGR Drain-gate Voltage (RGS =2 0kΩ ) 600 V VGS Gate- source Voltage ±30 V ID Drain Current (continuos) at TC =2 5°C5 A ID Drain Current (continuos) at TC = 100°C 3.1 A IDM (l ) Drain Current (pulsed) 20 A PTOT Total Dissipation at TC =2 5°C 50 W Derating Factor 0.4 W/ °C dv/dt(1) Peak Diode Recovery voltage slope 6 V/ns Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature 150 °C DPAK TO-252 INTERNAL SCHEMATIC DIAGRAM

ELECTRICAL CHARACTERISTICS (TCASE = 25°C UNLESS OTHERWISE SPECIFIED) OFF ON (1) DYNAMIC Note: 1. Pulsed: Pulse duration = 300µs, duty cycle 1.5 %. Rthj-case Thermal Resistance Junction-case Max 2.5 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Rthc-sink Thermal Resistance Case-sink Typ 0.5 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tjmax) 5A EAS Single Pulse Avalanche Energy (starting Tj=2 5°C, ID =IAR ,V DD =5 0V ) 400 mJ Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250µA, VGS =0 600 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) VDS = Max Rating 1 µA VDS = Max Rating, TC = 125°C 10 µA IGSS Gate-body Leakage Current (VDS =0 ) VGS = ±30V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS =V GS ,ID = 250µA 345V R DS(on) Static Drain-source On Resistance VGS = 10V, ID = 2.5A 0.8 0.9 Ω ID(on) On State Drain Current VDS >ID(on)xR DS(on)max, VGS =1 0 V 5A Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs(1) Forward Transconductance VDS >ID(on)xR DS(on)max, ID = 2.5A 2.4 S C iss Input Capacitance VDS = 25V, f = 1 MHz, VGS =0 412 pF C oss Output Capacitance 94 pF C rss Reverse Transfer Capacitance 10 pF R G Gate Input Resistance f=1 MHz Gate DC Bias = 0 Test Signal Level = 20mV Open Drain 3 Ω

ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1. Pulsed: Pulse duration = 300µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time Rise Time VDD = 300V, ID = 2.5A R G = 4.7Ω VGS = 10V (see test circuit, Figure 3) 16 ns tr 9n s Q g Total Gate Charge VDD = 400V, ID = 5A, VGS = 10V 13 nC Q gs Gate-Source Charge 3 nC Q gd Gate-Drain Charge 11 nC Symbol Parameter Test Conditions Min. Typ. Max. Unit tr(Voff) Off-voltage Rise Time VDD = 480V, ID = 5A, R G =4 . 7Ω, VGS = 10V (see test circuit, Figure 5) 20 ns tf Fall Time 29 ns tc Cross-over Time 30 ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD Source-drain Current 5 A ISDM (2) Source-drain Current (pulsed) 20 A VSD (1) Forward On Voltage ISD = 5A, VGS =0 1.5 V trr Reverse Recovery Time ISD = 5A, di/dt = 100A/µ s, VDD = 100V, Tj= 150°C (see test circuit, Figure 5) 300 ns Q rr Reverse Recovery Charge 1.8 µC IRRM Reverse Recovery Current 12 A

Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4:Gate Charge test Circuit Fig. 2:Unclamped Inductive WaveformFig. 1:Unclamped Inductive Load Test Circuit Fig. 3:Switching Times Test Circuit For Resistive Load

DIM. mm inch A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.9 0.025 0.035 B2 5.2 5.4 0.204 0.212 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 9.35 10.1 0.368 0.397 L2 0.8 0.031 L4 0.6 1 0.023 0.039 DL2 B E G A C H A1DETAIL ”A” DETAIL ”A” TO-252 (DPAK) MECHANICAL DATA 0068772-B

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics  2000 STMicroelectro nics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com