STD5N65M6 STMICROELECTRONICS | Alldatasheet

Document overview

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  • PDF pages: 15

Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuits
  • 4 Package information
  • 4.1 DPAK (TO-252) package information
  • 4.2 DPAK (TO-252) packing information
  • 5 Revision history

Features

Order code VDS RDS(on) max. ID STD5N65M6 650 V 1.3 Ω 4 A  Reduced switching losses  Lower RDS(on) x area vs previous generation  Low gate input resistance  100% avalanche tested  Zener-protected

Applications

 Switching applications

Description

The new MDmesh™ M6 technology incorporates the most recent advancements to the well-known and consolidated MDmesh family of SJ MOSFETs. STMicroelectronics builds on the previous generation of MDmesh devices through its new M6 technology, which combines excellent RDS(on) * area improvement with one of the most effective switching behaviors available, as well as a user-friendly experience for maximum end- application efficiency. Table 1: Device summary Order code Marking Package Packing STD5N65M6 5N65M6 DPAK Tape and reel

1 Electrical ratings

Table 2: Absolute maximum ratings Symbol Parameter Value Unit VGS Gate-source voltage ± 25 V ID Drain current (continuous) at TC = 25 °C 4 A ID Drain current (continuous) at TC = 100 °C 2.5 A IDM(1) Drain current (pulsed) 16 A PTOT Total dissipation at TC = 25 °C 45 W dv/dt(2) Peak diode recovery voltage slope 5 V/ns dv/dt(3) MOSFET dv/dt ruggedness 50 TJ Operating junction temperature range -55 to 150 °C Tstg Storage temperature range Notes: (1)Pulse width limited by safe operating area (2)ISD ≤ 4 A, di/dt = 400 A/μs; VDS peak < V(BR)DSS, VDD = 400 V (3)VDS ≤ 520 V Table 3: Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case 2.78 °C/W Rthj-pcb(1) Thermal resistance junction-pcb 50 Notes: (1)When mounted on FR-4 board of inch², 2oz Cu. Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax) 1 A Eas Single pulse avalanche energy (starting Tj=25°C, ID= IAR, VDD=50 V) 90 mJ

2 Electrical characteristics

TC = 25 °C unless otherwise specified Table 5: On/off-state Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS= 0, ID = 1 mA 650 V IDSS Zero gate voltage drain current VGS = 0 V, VDS = 650 V 1 µA VGS = 0 V, VDS = 650 V; TC = 125 °C (1) 100 µA IGSS Gate body leakage current VDS = 0 V, VGS = ±25 V ±5 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2.25 3 3.75 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 2 A 1.15 1.3 Ω Notes: (1)Defined by design, not subject to production test. Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V - 170 - pF Coss Output capacitance - 20 - pF Crss Reverse transfer capacitance - 1 - pF Coss eq.(1) Equivalent output capacitance VDS = 0 to 520 V, VGS = 0 V - 35 - pF RG Intrinsic gate resistance f = 1 MHz, ID=0 A - 5 - Ω Qg Total gate charge VDD = 350 V, ID = 1 A, VGS= 10 V, (see Figure 15: "Test circuit for gate charge behavior") - 5.1 - nC Qgs Gate-source charge - 0.8 - nC Qgd Gate-drain charge - 2 - nC Notes: (1)Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS Table 7: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD= 325 V, ID = 2 A, RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform") - 6.5 - ns tr Rise time - 5.9 - ns td(off) Turn-off delay time - 17.4 - ns tf Fall time - 15.2 - ns

Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current 4 A ISDM(1) Source-drain current (pulsed) 16 A VSD(2) Forward on voltage ISD = 4 A, VGS = 0 V - 1.6 V trr Reverse recovery time ISD = 4 A, di/dt = 100 A/µs, VDD = 60 V, (see Figure 19: "Switching time waveform") - 222 ns Qrr Reverse recovery charge - 1.24 µC IRRM Reverse recovery current - 11.2 A trr Reverse recovery time ISD = 4 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 19: "Switching time waveform") - 264 ns Qrr Reverse recovery charge - 1.39 µC IRRM Reverse recovery current - 10.5 A Notes: (1)Pulse width limited by safe operating area (2)Pulsed: pulse duration = 300 µs, duty cycle 1.5%

2.1 Electrical characteristics (curves)

Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance K CG34360 c -1 tp (s)10

3 Test circuits

Figure 14: Test circuit for resistive load switching times Figure 15: Test circuit for gate charge behavior Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform

4 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

4.1 DPAK (TO-252) package information

Figure 20: DPAK (TO-252) type A package outline 0068772_A_21

Table 9: DPAK (TO-252) type A mechanical data Dim. mm Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 5.10 5.25 E 6.40 6.60 E1 4.60 4.70 4.80 e 2.16 2.28 2.40 e1 4.40 4.60 H 9.35 10.10 L 1.00 1.50 L2 0.65 0.80 0.95 L4 0.60 1.00 R 0.20 V2 0°

Figure 21: DPAK (TO-252) recommended footprint (dimensions are in mm)

4.2 DPAK (TO-252) packing information

Figure 22: DPAK (TO-252) tape outline

Figure 23: DPAK (TO-252) reel outline Table 10: DPAK (TO-252) tape and reel mechanical data Tape Reel Dim. mm Dim. mm Min. Max. Min. Max. A0 6.8 7 A 330 B0 10.4 10.6 B 1.5 12.1 C 12.8 13.2 D 1.5 1.6 D 20.2 D1 1.5 G 16.4 18.4 E 1.65 1.85 N 50 F 7.4 7.6 T 22.4 K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3

5 Revision history

Table 11: Document revision history Date Revision Changes 05-May-2016 1 Initial release.