STD55NH2LL STMICROELECTRONICS | Alldatasheet

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Technical content

N-CHANNEL 24V - 0.010 Ω - 40A DPAK/IPAK ULTRA LOW GATE CHARGE STripFET™ POWER MOSFET ■TYPICAL RDS(on) = 0.01 Ω @ 10 V ■TYPICAL RDS(on) = 0.012 Ω @ 4.5 V ■RDS(ON) * Qg INDUSTRY’s BENCHMARK ■CONDUCTION LOSSES REDUCED ■SWITCHING LOSSES REDUCED ■LOW THRESHOLD DEVICE ■THROUGH-HOLE IPAK (TO-251) POWER PACKAGE IN TUBE (SUFFIX “-1") ■SURFACE-MOUNTING DPAK (TO-252) POWER PACKAGE IN TAPE & REEL (SUFFIX “T4")

DESCRIPTION

The STD55NH2LL is based on the latest generation of ST's proprietary STripFET™ technology. An innovative layout enables the device to also exhibit extremely low gate charge for the most demanding requirements as high-side switch in high-frequency DC-DC converters. It's therefore ideal for high-density converters in Telecom and Computer applications.

APPLICATIONS

■SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY DC/DC CONVERTES TYPE VDSS RDS(on) ID STD55NH2LL 24 V < 0.011 Ω

40 A(*)

(Suffix “-1”) DPAK TO-252 (Suffix “T4”)

Ordering Information

TAPE & REEL TUBE Symbol Parameter Value Unit Vspike(1) Drain-source Voltage Rating V VDS Drain-source Voltage (VGS = 0) V VDGR Drain-gate Voltage (RGS = 20 kΩ) V VGS Gate- source Voltage ± 18 V ID(*) Drain Current (continuous) at TC = 25°C A ID Drain Current (continuous) at TC = 100°C A IDM(2) Drain Current (pulsed) 160 A Ptot Total Dissipation at TC = 25°C W Derating Factor 0.4 W/°C EAS(3) Single Pulse Avalanche Energy 600 mJ Tstg Storage Temperature -55 to 175 Tj Operating Junction Temperature INTERNAL SCHEMATIC DIAGRAM

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF ON (4) DYNAMIC Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose Max Max 2.5 100 275 °C/W °C/W Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating TC = 125°C µA µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 18V ±100 nA Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS = VGS ID = 250 µA V RDS(on) Static Drain-source On Resistance VGS = 10 V ID = 20 A VGS = 4.5 V ID = 20 A 0.010 0.012 0.011 0.0135 Ω Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs (4) Forward Transconductance VDS = 10 V ID = 10 A S Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 10V f = 1 MHz VGS = 0 990 385 pF pF pF RG Gate Input Resistance f = 1 MHz Gate DC Bias = 0 Test Signal Level = 20 mV Open Drain 1.3 Ω

(1) Garanted when external Rg=4.7 Ω and tf < tfmax. (4) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (2) Pulse width limited by safe operating area (5) Qoss = Coss*∆ Vin , Coss = Cgd + Cds . See Appendix A (3) Starting Tj = 25 oC, ID = 20A, VDD = 15V (*) Value limited by wire bonding Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 10 V ID = 20 A RG = 4.7 Ω VGS = 4.5 V (Resistive Load, Figure 3) ns ns Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge 0.44V ≤ VDD ≤ 10V, ID= 40 A VGS= 4.5 V 8.7 4.2 2.4 nC nC nC Qoss(5) Output Charge VDS= 16 V VGS= 0 V 7.6 nC Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off Delay Time Fall Time VDD = 10 V ID = 20 A RG = 4.7Ω, VGS = 10 V (Resistive Load, Figure 3) ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM Source-drain Current Source-drain Current (pulsed) 160 A A VSD (4) Forward On Voltage ISD = 20 A VGS = 0 1.3 V trr Qrr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 40 A di/dt = 100A/µs VDD = 15 V Tj = 150°C (see test circuit, Figure 5) 32.5 1.7 ns nC A ELECTRICAL CHARACTERISTICS (continued) Safe Operating Area Thermal Impedance

Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations

Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage vs Temperature

Fig. 1: Unclamped Inductive Load Test Circuit Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times

DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 0.9 1.1 0.035 0.043 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 5.2 5.4 0.204 0.212 0.85 0.033 0.3 0.012 0.95 0.037 C 0.45 0.6 0.017 0.023 0.48 0.6 0.019 0.023 D 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9.4 0.354 0.370 0.8 1.2 0.031 0.047 0.8 0.031 0.039 A C H D L B E G TO-251 (IPAK) MECHANICAL DATA 0068771-E

DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 0.9 1.1 0.035 0.043 0.03 0.23 0.001 0.009 B 0.64 0.9 0.025 0.035 5.2 5.4 0.204 0.212 C 0.45 0.6 0.017 0.023 0.48 0.6 0.019 0.023 D 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 9.35 10.1 0.368 0.397 0.8 0.031 0.6 0.023 0.039 D B E G A C H DETAIL "A" DETAIL "A" TO-252 (DPAK) MECHANICAL DATA 0068772-B

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