STA518_V01 STM | Alldatasheet
Document overview
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- PDF pages: 21
Technical content
Datasheet sections
- 1 Audio application circuit
- 2 Pin description
- 3 Electrical specifications
- 3.1 Absolute maximum ratings
- 3.2 Recommended operating conditions
- 3.3 Thermal data
- 3.4 Thermal information
- 3.5 Electrical characteristics
- 4 Technical information
- 4.1 Logic interface and decode
- 4.2 Power outputs
- 4.3 Parallel output / high current operation
- 4.4 Additional information
- 5 Characterization curves
- 6 Package information
- 7 Revision history
Features
Multipower BCD technology Minimum input output pulse width distortion 200 m RdsON complementary DMOS output stage CMOS-compatible logic inputs Thermal protection Thermal warning output Undervoltage protection Short-circuit protection
Description
The STA518 is a monolithic quad half-bridge stage in multipower BCD technology. The device can be used also as dual bridge or reconfigured, by connecting the CONFIG pin to the V dd pin, as a single bridge with double current capacity. The device is particularly designed to make the output stage of a stereo all-digital high-efficiency (DDX™) amplifier capable of delivering an output power of 24 W x 4 channels @ THD = 10% at V CC 30 V into a 4 load in single-ended configuration. It can also deliver 50 + 50 W @ THD = 10% at VCC 29 V as output power into an 8 load in BTL configuration and 70 W @ THD = 10% at VCC
34 V into 8 in a single paralleled BTL
configuration. The input pins have a threshold proportional to the VL pin voltage. PowerSSO36 with exposed pad (or slug) up Table 1. Device summary
Table 8. V
1 Audio application circuit
Figure 1. Audio application circuit (quad single-ended)
2 Pin description
Figure 2. Pin connections (top view) Table 2. Pin function
1 GND-SUB Substrate ground
4 Vcc2B Positive supply
5 GND2B Negative supply
6 GND2A Negative supply
7 Vcc2A Positive supply
12 Vcc1B Positive supply
13 GND1B Negative supply
14 GND1A Negative supply
15 Vcc1A Positive supply
18 NC Not connected
19 GND-clean Logical ground
20 GND-Reg Ground for regulator V dd
23 V L Logic reference voltage
24 CONFIG Configuration pin
25 PWRDN Short-circuit pin
26 TRI-STATE Hi-Z pin
27 FAULT Fault pin advisor
28 TH_WAR Thermal warning advisor
29 IN1A Input of half-bridge 1A
30 IN1B Input of half-bridge 1B
31 IN2A Input of half-bridge 2A
32 IN2B Input of half-bridge 2B
Table 3. Functional pin status
- The pin is an open collector. To have a high logic value, it needs to be pulled up by a resistor.
Table 2. Pin function (continued)
3 Electrical specifications
3.1 Absolute maximum ratings
3.2 Recommended operating conditions
3.3 Thermal data
3.4 Thermal information
Table 4. Absolute maximum ratings Table 5. Recommended operating conditions (1)
- Performance not guaranteed beyond recommended operating conditions
Table 6. Thermal data (1)
derating power vs. tamb for different heat sinks.
3.5 Electrical characteristics
Table 7. Electrical characteristics
- Table 8 explains the VLOW, VHIGH variation with Ibias.
- See relevant Application Note AN1994
Table 7. Electrical characteristics (continued) Table 8. VLOW, VHIGH variation with Ibias Table 9. Logic truth table (see Figure 4)
4 Technical information
channel (@ THD = 10% RL = 8 , VCC = 29 V) of audio output power. and thermal and short-circuit protection circuitry. configuration, according to the damped ternary modulation operation. automatic recovery. A thermal warning status is also provided. Figure 6. STA518 block diagram full-bridge DDX Figure 7. STA518 block diagram binary half-bridge mode
4.1 Logic interface and decode
the DDX control logic supply.
STA518 Technical information temperature exceeds 130 °C, in advance of the thermal shutdown protection. When a fault condition is detected, an internal fault signal acts to immediately disable the output power MOSFETs, placing both H-Bridges in high impedance state. At the same time an open-drain MOSFET connected to the FAULT pin (pin 27) is switched on. There are two possible modes subsequent to activating a fault: 1. SHUTDOWN mode: with FAULT (pull-up resistor) and TRI-STATE pins independent, an activated fault will disable the device, signaling low at the FAULT output. The device may subsequently be reset to normal operation by toggling the TRI-STATE pin from high to low to high using an external logic signal. 2. AUTOMATIC recovery mode: This is shown in the audio application circuit of quad single-ended. The FAULT and TRI-STATE pins are shorted together and connected to a time constant circuit comprising R59 and C58. An activated FAULT will force a reset on the TRI-STATE pin causing normal operation to resume following a delay determined by the time constant of the circuit. If the fault condition is still present, the circuit operation will continue repeating until the fault condition is removed. An increase in the time constant of the circuit will produce a longer recovery interval. Care must be taken in the overall system design as not to exceed the protection thresholds under normal operation.
4.2 Power outputs
The STA518 power and output pins are duplicated to provide a low impedance path for the device's bridged outputs. All duplicate power, ground and output pins must be connected for proper operation. The PWRDN or TRI-STATE pins should be used to set all MOSFETS to the Hi-Z state during power-up until the logic power supply, V L, is settled.
4.3 Parallel output / high current operation
When using DDX mode output, the STA518 outputs can be connected in parallel in order to increase the output current capability to a load. In this configuration the STA518 can provide 70 W into 8 ohm. This mode of operation is enabled with the CONFIG pin (pin 24) connected to VREG1 and the inputs combined INLA=INLB, INRA=INRB and the outputs combined OUTLA=OTLB, OUTRA=OUTRB.
4.4 Additional information
Output Filter: A passive 2nd order passive filter is used on the STA518 power outputs to reconstruct an analog audio signal. System performance can be significantly affected by the output filter design and choice of passive components. A filter design for 6 ohm / 8 ohm loads is shown in the typical application circuit of Figure 9. Quad single-ended circuit (Figure 1) shows a filter for half-bridge mode, 4 ohm loads.
Figure 8. Typical stereo full-bridge configuration to obtain 50 + 50 W @ THD = 10%, Figure 9. Typical single BTL configuration to obtain 70 W @ THD 10%, RL = 8 , STA50X demo board. Peak Power for t 1sec.
11 OUT1B
3 OUT2B
9 OUT2A
5 Characterization curves
configuration (Figure 1) with an STA308A controller. Figure 10. Power dissipation vs. output power Figure 11. Power derating curve Figure 12. THD+N vs. output power Figure 13. Output power vs. supply voltage Figure 14. THD vs. frequency
6 Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
Figure 19. PSSO36 (slug up) mechanical outline
Table 10. PowerSO36 exposed pad up dimensions Dimensions in mm. Dimensions in inch.
7 Revision history
Table 11. Document revision history 19-Aug-2004 1 Initial release. 11-Nov-2004 2 Changed symbol in “Electrical Characteristics”. 26-Feb-2014 4 Updated order code Table 1 on page 1. 11-Jul-2014 5 Updated figure in cover page.