STA505 STMICROELECTRONICS | Alldatasheet
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Technical content
■ MINIMUM INPUT OUTPUT PULSE WIDTH DISTORTION ■ 200m Ω RdsON COMPLEMENTARY DMOS OUTPUT STAGE ■ CMOS COMPATIBLE LOGIC INPUTS ■ THERMAL PROTECTION ■ THERMAL WARNING OUTPUT ■ UNDER VOLTAGE PROTECTION
DESCRIPTION
STA505 is a monolithic quad half bridge stage in Mul- tipower BCD Technology. The device can be used as dual bridge or reconfigured, by connecting CONFIG pin to Vdd pin, as single bridge with double current capability, and as half bridge (Binary mode) with half current capability. The device is particularly designed to make the out- put stage of a stereo All-Digital High Efficiency (DDX™) amplifier capable to deliver 50 + 50W @ THD = 10% at V cc 30V output power on 8Ω load and 80W @ THD = 10% at Vcc 36V on 8Ω load in single BTL configuration. The input pins have threshold proportional to Ibias pin voltage. PowerSO36 ORDERING NUMBER: STA505 40V 3.5A QUAD POWER HALF BRIDGE AUDIO APPLICATION CIRCUIT (Dual BTL) L18 22mH L19 22mH C30 1mF C20 100nF C99 100nF C101 100nF C107 100nF C106 100nF C23 470nF C55 1000mF C21 100nF C58 100nF C58 100nF R57 10K R59 10K R63 R98 R100 C53 100nF C60 100nF C31 1mF C52 330pF R104 C109 330pF IN1A IN1A IBIAS CONFIG PWRDNPWRDN FAULT TRI-STATE TH_WAR TH_WAR +3.3V IN1B VDD VDD VSS VSS VCC SIGN VCC SIGN GND-Reg GND-Clean IN2A IN1B IN2A IN2B PROTECTIONS LOGIC REGULATORS OUT1A GND1A OUT1A V CC 1A OUT1B GND1B OUT1B VCC 1B L113 22mH L112 22mH C32 1mF +VCC C108 470nF C33 1mF M17 M15 M16 M14 OUT2A GND2A OUT2A V CC 2A OUT2B GND2B D00AU1148B OUT2B VCC 2B GNDSUB IN2B 32 C110 100nF C111 100nF R103 R102 MULTIPOWER BCD TECHNOLOGY
N° Pin Description
1 GND-SUB Substrate ground
35 ; 36 Vcc Sign Signal Positive Supply
15 Vcc1A Positive Supply
12 Vcc1B Positive Supply
7 Vcc2A Positive Supply
4 Vcc2B Positive Supply
14 GND1A Negative Supply
13 GND1B Negative Supply
6 GND2A Negative Supply
5 GND2B Negative Supply
16 ; 17 OUT1A Output half bridge 1A 10 ; 11 OUT1B Output half bridge 1B 8 ; 9 OUT2A Output half bridge 2A 2 ; 3 OUT2B Output half bridge 2B
29 IN1A Input of half bridge 1A
30 IN1B Input of half bridge 1B
31 IN2A Input of half bridge 2A
32 IN2B Input of half bridge 2B
21 ; 22 Vdd 5V Regulator referred to ground 33 ; 34 Vss 5V Regulator referred to +Vcc
25 PWRDN Stand-by pin
26 TRI-STATE Hi-Z pin
27 FAULT Fault pin advisor
24 CONFIG Configuration pin
28 TH-WAR Thermal warning advisor
19 GND-clean Logical ground
23 IBIAS High logical state setting voltage
18 NC Not connected
20 GND-Reg Ground for regulator Vdd
(*) : The pin is open collector. To have the high logic value, it needs to be pulled up by a resistor. (**): To put CONFIG = 1 means connect Pin 24 (CONFIG) to Pins 21, 22 (Vdd) PIN CONNECTION PIN NAME Logical value IC -STATUS FAULT 0 Fault detected (Short circuit, or Thermal ..) FAULT (*) 1 Normal Operation TRI-STATE 0 All powers in Hi-Z state TRI-STATE 1 Normal operation PWRDN 0 Low absorpion PWRDN 1 Normal operation THWAR 0 Temperature of the IC =130C THWAR (*) 1 Normal operation CONFIG 0 Normal Operation CONFIG (**) 1 OUT1A=OUT1B ; OUT2A=OUT2B (IF IN1A = IN1B; IN2A = IN2B) GND-SUB OUT2B OUT2B V CC 2B GND1B VCC 1A GND1A OUT1A OUT1AGND-Reg VDD VDD CONFIG IBIAS VSS VSS VCC Sign VCC Sign 19 N.C.GND-Clean D01AU1273 OUT1B VCC 1B OUT1B PWRDN FAULT TRI-STATE OUT2ATH_WAR 1027 GND2B OUT2A VCC 2A IN1A IN2B IN1B GND2AIN2A 1324
ELECTRICAL CHARACTERISTCS (Ibias = 3.3V; Vcc = 30V; T = 25°C unless otherwise specified) Symbol Parameter Value Unit VCE DC Supply Voltage (Pin 4,7,12,15) 40 V Vmax Maximum Voltage on pins 23 to 32 5.5 V Top Operating Temperature Range 0 to 70 °C Tstg, Tj Storage and Junction T emperature -40 to 150 °C Symbol Parameter Min. Typ. Max. Unit Tj-case Thermal Resistance Junction to Case (thermal pad) 2.5 °C/W TjSD Thermal shut-down junction temperature 150 °C Twarn Thermal warning temperature 130 °C thSD Thermal shut-down hysteresis 25 °C Symbol Parameter Test conditions Min. Typ. Max. Unit R dsON Power Pchannel/Nchannel MOSFET RdsON Id=1A; 200 270 m Ω Idss Power Pchannel/Nchannel leakage Idss Vcc=35V 50 µA gN Power Pchannel RdsON Matching Id=1A 95 % gP Power Nchannel RdsON Matching Id=1A 95 % Dt_s Low current Dead Time (static) see test circuit no.1; see fig. 1 10 20 ns Dt_d High current Dead Time (dinamic) L=22µH; C = 470nF; Rl = 8 Ω Id=3.5A; see fig. 3 50 ns td ON Turn-on delay time Resistive load 100 ns td OFF Turn-off delay time Resistive load 100 ns tr Rise time Resistive load; as fig.1; 25 ns tf Fall time Resistive load; as fig. 1; 25 ns VCC Supply voltage operating voltage 9 36 V VIN-H High level input voltage Ibias/2 +300mV V VIN-L Low level input voltage Ibias/2 -300mV V IIN-H Hi level Input current Pin voltage = Ibias 1 µA IIN-L Low level input current Pin voltage = 0.3V 1 µA
Notes: 1. The following table explains the VL, VH variation with Ibias Note 2: If used in single BTL configuration, the device may be not short circuit protected LOGIC TRUTH TABLE (see fig. 2) IPWRDN-H Hi level PWRDN pin input current Ibias = 3.3V 35 µA VL Low logical state voltage VL (pin PWRDN, TRISTATE) (note 1) Ibias = 3.3V 0.8 V VH High logical state voltage VH (pin PWRDN, TRISTATE) (note 1) Ibias = 3.3V 1.7 V IVCC- PWRDN Supply current from Vcc in Power Down PWRDN = 0 3 mA IFAULT Output Current pins FAULT -TH-WARN when FAULT CONDITIONS Vpin = 3.3V 1 mA IVCC-hiz Supply current from Vcc in Tri- state Tri-state=0 22 mA IVCC Supply current from Vcc in operation both channel switching) Input pulse width = 50% Duty; Switching Frequency = 384Khz; No LC filters; 80 mA I VCC-q Isc (short circuit current limit) (note 2) 3.5 6 8 A IOUT -SH Undervoltage protection threshold 7 V VOV Output minimum pulse width No Load 70 150 ns Ibias VLmin VHmax Unit 2.7 0.7 1.5 V 3.3 0.8 1.7 V 5 0.85 1.85 V TRI-STATE INxA INxB Q1 Q2 Q3 Q4 OUTPUT MODE 0 x x OFF OFF OFF OFF Hi-Z 1 0 0 OFF OFF ON ON DUMP 1 0 1 OFF ON ON OFF NEGATIVE 1 1 0 ON OFF OFF ON POSITIVE 1 1 1 ON ON OFF OFF Not used Symbol Parameter Test conditions Min. Typ. Max. Unit ELECTRICAL CHARACTERISTCS (continued)
Figure 4. Typical Single BTL Configuration to obtain 80W @ THD 10%, RL = 8Ω , VCC = 36V (note 1) Note: 1. "A PWM modulator as driver is needed . In particular, this result is performed using the STA30X+STA50X demo board". Figure 5. Typical Quad Half bridge Configuration
11 OUT1B
3 OUT2B
9 OUT2A
DIM. mm inch A 3.25 3.5 0.128 0.138 A2 3.3 0.13 A4 0.8 1 0.031 0.039 A5 0.2 0.008 a1 0 0.075 0 0.003 b 0.22 0.38 0.008 0.015 c 0.23 0.32 0.009 0.012 D 15.8 16 0.622 0.630 D1 9.4 9.8 0.37 0.38 D2 1 0.039 E 13.9 14.5 0.547 0.57 E1 10.9 11.1 0.429 0.437 E2 2.9 0.114 E3 5.8 6.2 0.228 0.244 E4 2.9 3.2 0.114 1.259 e 0.65 0.026 e3 11.05 0.435 G 0 0.075 0 0.003 H 15.5 15.9 0.61 0.625 h 1.1 0.043 L 0.8 1.1 0.031 0.043 N 10˚ (max) s 8˚ (max) (1) “D and E1” do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.15mm (0.006”) (2) No intrusion allowed inwards the leads. PowerSO36 (SLUG UP) 7183931
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