Adjustable inverting negative output current mode PWM regulators
Document overview
- Manufacturer or author: STMicroelectronics
- PDF pages: 16
Technical content
Datasheet sections
- 1 Diagram
- 2 Pin configuration
- 3 Maximum ratings
- 4 Electrical characteristics
- 5 Application information
- 6 Application circuit
- 7 Typical performance characteristi cs
- 8 Package mechanical data
- 9 Revision history
Features
■ 2.7V to 11V input to adjustable negative output conversion ■ 1W guaranteed output power (VI > 4.5V, TA ≤ 70°C) ■ 68% typ. efficiency at 6V ■ Very low quiescent current: 1.2mA in on mode, 10µA in shut down mode ■ Soft start ■ Very low noise output ■ 160KHz fixed frequency oscillator ■ Mixed bipolar-CMOS technology
Description
The ST755 is an adjustable inverting switch-mode DC-DC regulator with internal Power MOSFET that generators an adjustable negative output from a voltage input of 2.7V to 11V, output current guaranteed at 200mA (for V I > 4.5V, VO = -5V and TA = 0°C to 70°C) and 275mA (typical value at TA = 25°C, VO = -5V). A logic controlled shut down pin that interfaces directly with microprocessor reduces supply current to only 10mA. Input to Output differential voltage is limited to V I+|VO|<12.7V. No load supply current is 1.2mA SO-8 Table 1. Device summary
1 Diagram
Figure 1. Schematic diagram
2 Pin configuration
Figure 2. Pin connections (top view) Table 2. Pin description
1 SHDN SHUT -DOWN control (VCC = ON, GND = Shutdown)
4 CC Compensation input
6 GND Ground
7 LX Switch output
3 Maximum ratings
Table 3. Absolute maximum ratings
- The input to output differential voltage is limited to V CC+|VO|<12.7V
Table 4. Thermal data
- This value depends from thermal design of PCB on which the device is mounted.
4 Electrical characteristics
Table 5. Electrical characteristics (Refer to the test circuits, VCC = 5V, VO = -5.25 to -4.75V,
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5 Application information
The ST755 is an IC developed for voltage conversion from an input voltage ranging from +2.4V to 11V to a regulated adjustable negative output limited by |VO| ≤ 12.7V - VI. The circuit adopts a current-mode PWM control scheme to achieve good efficiency, high stability and low noise performance. The figure in the first page shown the detailed block diagram of the device. ST755 is realized in a BCD technology in order to achieve high temperature stability, the best REFERENCE precision, a very low quiescent current and jitter free operations. The final stage is built around a 0.7Ω - 2A P-Channel Power MOS. A fraction of the output current is splitted out for current detection.Internal clock frequency is fixed to 160KHz. Error amplifier drives the PWM comparator in order to keep 0V on the CC input. So R 3 and R4 resistors are calculated by the following formulae R4 = (|VO|/VREF)*R3 (see Figure 3.). For R3 can be choose any value between 2KΩ and 20KΩ. Soft-Start (SS) input is a voltage dependent-output current limit (see Figure 11., Switch Current Limit vs. SS Input Voltage). SS pin is internally pulled to VREF through a 1.2 MΩ resistor. Applying an appropriate capacitor at SS input is possible to obtain a soft-start current imitation during power up. Forcing Soft-Start (SS) input to a lower voltage through a resistive voltage driver (R 1 and R2), the maximum LX current limit can be lowered according the diagram showed in Figure 11. When SHDN input is low, the total current consumption is reduced to 10µA.
6 Application circuit
current vs. load current graph (Figure 6.). (*) R1 and R2 can be omitted for IO<200mA. (**) C6: Very low noise but poor transient and load response speed. (***) C3 (alternative to C6): faster transient and load response. Figure 3. Typical application circuit
Figure 4. Printed demoboard Table 6. Component values
7 Typical performance characteristics
Figure 5. Load current vs supply voltage Figure 6. Peak inductor current vs load curr. Figure 7. Load current vs supply voltage Figure 8. Switch ON resist. vs supply voltage Figure 9. Efficiency vs load current Figure 10. Oscillator frequency vs
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8 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Obsolete Product(s) - Obsolete Product(s) DIM. mm. inch A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.04 0.010 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 3.80 4.00 0.150 0.157 e 1.27 0.050 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 k ˚ (max.) ddd 0.1 0.04 SO-8 MECHANICAL DATA 0016023/C
Obsolete Product(s) - Obsolete Product(s) DIM. mm. inch A 330 12.992 C 12.8 13.2 0.504 0.519 D 20.2 0.795 N 60 2.362 T 22.4 0.882 Ao 8.1 8.5 0.319 0.335 Bo 5.5 5.9 0.216 0.232 Ko 2.1 2.3 0.082 0.090 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 Tape & Reel SO-8 MECHANICAL DATA
9 Revision history
Table 7. Revision history 06-Jul-2007 5 Device summary updated and the document has been reformatted.