ST7536

ST7536 STMICROELECTRONICS | Alldatasheet

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Technical content

.HALF DUPLEX SYNCHRONOUS FSK MODEM - TWO PROGRAMMABLE CHANNELS FOR 600BPS DATA RATE - TWO PROGRAMMABLE CHANNELS FOR 1200BPS DATA RATE .AUTOMATICALLYTUNED Rx AND Tx FILTERS .TX CARRIER FREQUENCIES SYNTHESIZED FROM EXTERNAL CRYSTAL .LOW DISTORTION Tx SIGNAL (S/H2≥ 50dB) .AUTOMATIC LEVELCONTROL ON Tx SIGNAL .Rx SENSITIVITY : 2mVRMS (600bps) 3mV RMS (1200bps) .Rx CLOCK RECOVERY .POWER-DOWN MODE .SUITABLE TO APPLICATION IN ACCORDANCE WITH DH028/29 ENEL, EN50065-1 CENELEC AND FCC SPECIFICATIONS

DESCRIPTION

The ST7536 is a half duplex synchronous FSK MODEM designed for power line communication network applications. It operates from a dual power supply +5V and -5V, and requires an external interface for the coupling to the power line. It offers two programmable data rate with two programmablechannels each. PLCC28 (Plastic Leaded Chip Carrier Package) ORDER CODE : ST7536CFNRx/Tx 11 19 VDD SSAV DV SS DV DD ATO ALCI TxFI RxFO RAI AGND DEMI IFO AFCF BRS CHS RESET TEST 4 TEST 3 TEST 2 TEST 1 CLR/T RxD RxDEM DGND TxD XTAL 2 XTAL 1 A 7536-01.EPS PIN CONNECTIONS

Number Name Type Description

1 Rx/Tx Digital Rx or Tx mode selection input

2 RESET Digital Logic reset and power-down mode input. Active when low. 3 TEST4 Digital Test input which selects the Tx band-pass filter input (TxFI) when high. 4 TEST3 Digital Test input which gives an access to the clock recovery input stage. This input is selected when TEST1 is high.

5 RxD Digital Synchronous receive data output

6 CLR/T Digital Rx or Tx clock according to the functional mode

7 RxDEM Digital Demodulated data output

8 DGND Supply Digital ground

DD Supply Digital positive supply voltage : 5V± 5%

10 TEST1 Digital Test input which cancels the Tx to Rx mode automatic switching and validates TEST3

input. Active when high. 11 TEST2 Digital Test input which reduces the Tx to Rx mode automatic switching time. Active when high.

12 TxD Digital Transmit data input

13 XTAL2 Digital Crystal oscillator output

14 XTAL1 Digital Crystal oscillator input

15 CHS Digital Channel selection input

16 BRS Digital Baud rate selection input

17 AFCF Analog Automatic frequency control output for connecting compensation network. 18 DV SS Supply Digital negative supply voltage : -5V± 5%

19 IFO Analog Intermediate frequency filter output

20 DEMI Analog FSK demodulator input

SS Supply Analog negative supply voltage : -5V± 5%

22 AGND Supply Analog ground : 0V

DD Supply Analog positive supply voltage : 5V± 5%

24 RAI Analog Receive analog input

25 RxFO Analog Receive filter output

26 TxFI Analog Transmit filter input (selected when TEST4 is high)

27 ALCI Analog Automatic level control input

28 ATO Analog Analog transmit output

7536-01.TBL ST7536

S.C. FILTER CORRELATOR 18 23 2627 TEST LOGIC REFERENCE VOLTAGE CLOCK RECOVERY FSK MODULATOR 20dB GAIN AFC ALC TIME BASE AND CONTROL LOGIC 2 FSK DEMODULATOR IFO XTAL2 XTAL1 Rx/Tx RESET BRS CHS TxD TxFI DEMI RAI AFCF ATO ALCI RxDEM RxD CLR/T TEST1 TEST2 TEST3 TEST4 RxFO DGND AGNDDV DD AV SSDV SS RX BAND-PASS S.C. FILTER SMT. FILTER A.A. FILTER I.F. BAND-PASS S.C. FILTER SMT. FILTER A.A. FILTER AV DD TX BAND-PASS S.C. FILTER A.A. FILTER A.A. FILTER MUX MUX ST7536 7536-02.EPS BLOCK DIAGRAM ST7536

Symbol Parameter Value Unit AV DD /DVDD Positive Supply Voltage (1) -0.3, +7 V AV SS /DVSS Negative Supply Voltage (1) -7, +0.3 V VAGND/DGND Voltage between AGND and DGND -0.3, +0.3 V VI Digital Input Voltage DGND-0.3, DV DD +0.3 V VO Digital Output Voltage DGND-0.3, DV DD +0.3 V IO Digital Output Current -5, +5 mA Vi Analog Input Voltage AV SS -0.3, AVDD +0.3 V Vo Analog Output Voltage AV SS -0.3, AVDD +0.3 V Io Analog Output Current -5, +5 mA PD Power Dissipation 500 mW Toper Operating Temperature - 25, + 70 oC Tstg Storage Temperature - 65, + 150 oC Notes :1. The voltages are referenced to AGND and DGND. 2. Latch-up problems can be overcome with 2 reverse biased schottky diodes connected respectively between A/DVDD & A/DGND and A/DVSS & A/DGND. 3. Absolute maximum ratings are values beyond which damage to device may occur. Functional operation under these conditions is not implied. 7536-02.TBL GENERAL ELECTRICAL CHARACTERISTICS The test conditionsare A/DVDD = +5V, A/DVSS = -5V, A/DGND = 0V, Tamb = -10 to 70oC unless otherwise specified Symbol Parameter Test Conditions Min. Typ. Max. Unit AV DD /DVDD Positive Supply Voltage 4.75 5 5.25 V AV SS /DVSS Negative Supply Voltage -5.25 -5 -4.75 V AIDD +D IDD Positive Supply Current in Tx Mode RESET = 1, RX/Tx = 0 30 35 mA AIDD +D IDD Positive Supply Current in Rx Mode RESET = 1, RX/Tx = 1 29 34 mA AISS +D ISS Negative Supply Current in Tx Mode RESET = 1, RX/Tx = 0 - 34 - 29 mA AISS +D ISS Negative Supply Current in Rx Mode RESET = 1, RX/Tx = 1 - 33 - 28 mA AIDD +D IDD Positive Power-down Current RESET = 0, RX/Tx = 1 XTAL1 = 1 1.2 mA AISS +D ISS Negative Power-down Current - 1.2 mA VIH High Level Input Voltage Digital inputs except XTAL1 2.2 V VIL Low Level Input Voltage Digital inputs 0.8 V VOH High Level Output Voltage Digital outputs, I OH = - 400µA 2.4 V VOL Low Level Output Voltage Digital outputs, I OL = 1.6mA 0.4 V VIH High Level Input Voltage XTAL1 input 3.6 V DC XTAL1 Clock Duty Cycle External clock 40 60 % 7536-03.TBL ST7536

TRANSMITTER ELECTRICAL CHARACTERISTICS The test conditionsare A/DVDD = +5V, A/DGND = 0V, A/DVSS = -5V, Tamb = -10 to +70oC unless othewise specified Symbol Parameter Test Conditions Min. Typ. Max. Unit VTAC Max Carrier Output AC Voltage R L =2 kΩ ,VALCI <V T1 2.8 3.2 3.7 V PP HD2 Second Harmonic Distortion R L =2 kΩ ,VALCI <V T1 0.32 % FD FSK Peak-to-peak Deviation BRS = 0 BRS = 1 600 1200 Hz Hz TRxTx Carrier Activation Time After Rx/Tx 1 → 0 transition 1 ms TALC Carrier Stabilisation Time ALC maximum settling time, 32 gain steps 5 ms DRNG ALC Dynamic Range 25 26 27 dB VT1 ALC Low Threshold Voltage 1.81 1.87 V VT2 ALC High Threshold Voltage 2.12 2.18 V GST ALC Gain Step 0.84 dB PSRR1 PSRR2 Power supply rejection ratio on ATO (see Note 1) VIN = 200mVPP ,fIN = 50Hz on VDD or VSS 35 dB dB Note 1 :This characteristic is guaranteed by correlation. 7536-04.TBL RECEIVER ELECTRICAL CHARACTERISTICS The test conditionsare A/DVDD = +5V, A/DGND = 0V, A/DVSS = -5V, Tamb = -10 to +70oC unless othewise specified Symbol Parameter Test Conditions Min. Typ. Max. Unit VIN Maximum Input Signal 2V RMS R IN Input Impedance 100 k Ω RCJ Recovered Clock Jitter Percentage of the nominal clock - 5 + 5 % PSRR1 PSRR2 Power supply rejection ratio on RxFO (see Note 1) VIN = 200mVPP ,fIN = 50Hz on VDD or VSS 35 dB dB VIN0 VIN1 Rx sensitivity (see Note 1) Typical measured BER < 10-5 BRS = 0 BRS = 1 mV RMS BER1 BER2 Bit error rate at minimum Rx signal (see Note 1) White Noise, S/N = 15dB RAI = 2mVRMS , BRS = 0 RAI = 3mVRMS , BRS = 1 2 ⋅10-5 3 ⋅10-4 10-3 10-3 BER3 Bit error rate at maximum Rx sig- nal (see Note 1) RAI = 2VRMS , White Noise, S/N = 25dB 10 -7 10-3 BER4 Bit error rate at medium Rx signal (see Note 1) RAI= 0.6VRMS , S/N= 15dB 10 -6 10-3 BER5 Bit error rate with impulsive noise (see Note 1) RAI = 90mVRMS ,N=5 V PP pulse wave, f = 100Hz, duty cycle = 10% 10-3 BER6 BER7 Bit error rate with modulated sinusoidal noise Ns (see Note 1) S+ Ns < 0.2VRMS , Ns = sine carrier with 80% AM modul., fm = 1kHz, See Figure 5 Smin = 2mV RMS , BRS = 0 Smin = 3mV RMS , BRS = 1 10-3 10-3 Note 1 :This characteristic is guaranteed by correlation 7536-05.TBL ST7536

-10 -20 -30 -40 -50 0 0.5 1 1.5 2 B Frequency (f/fc) B = 20kHz at 600 Bit/s (BRS = 0) B = 40kHz at 1200 Bit/s -BRS = 1) fc : Central Carrier Frequency SS/N (dB) 7536-07.EPS Figure 5 :S/N Mask for 80% AM Sine Noise FILTER TEMPLATES Frequency (kHz) Test Conditions Amplitude (dB) Min. Typ. Max. RECEIVE AND TRANSMIT FILTER BRS = 0, CHS = 0 -3 5 79.05 - 4 - 3 - 2 Ref 82.05 0 85.05 - 4 - 3 - 2 123 - 35 44.4 BRS = 0, CHS = 1 -3 5 6 5 -4 -3 -2 Ref 67.46 0 69.93 - 4 - 3 - 2 101.13 - 35 47.57 BRS = 1, CHS = 0 -3 5 69.64 - 4 - 3 - 2 Ref 72.28 0 74.92 - 4 - 3 - 2 108.36 - 35 57.08 BRS = 1, CHS = 1 -3 5 83.57 - 4 - 3 - 2 Ref 86.74 0 89.91 - 4 - 3 - 2 130.03 - 35 Frequency (kHz) Test Conditions Amplitude (dB) Min. Typ. Max. INTERMEDIATE FREQUENCY FILTER 1.2 BRS = 0 -3 5 2.15 - 5 - 3 - 2 Ref 2.7 0 3.25 - 5 - 3 - 2 5.8 - 35 2.4 BRS = 1 -3 5 4 . 3 -5 -3 -2 Ref 5.4 0 6 . 5 -5 -3 -2 11.6 - 35 7536-06.TBL ST7536

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previouslysupplied. STMicroelectronics products are not authorized for use as criticalcomp onentsin lifesupport devicesor systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics  1998 STMicroelectronics - All Rights Reserved Purchase of I 2C Components of STMicroelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan- Thailand - United Kingdom - U.S.A. http://www.st.com PMPLCC28.EPS PACKAGE MECHANICAL DATA

28 PINS - PLASTIC LEADED CHIP CARRIER (PLCC)

Dimensions Millimeters Inches A 12.32 12.57 0.485 0.495 B 11.43 11.58 0.450 0.456 D 4.2 4.57 0.165 0.180 D1 2.29 3.04 0.090 0.120 D2 0.51 0.020 E 9.91 10.92 0.390 0.430 e 1.27 0.050 e3 7.62 0.300 F 0.46 0.018 F1 0.71 0.028 G 0.101 0.004 M 1.24 0.049 M1 1.143 0.045 PLCC28.TBL ST7536