ST732 STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 21
Technical content
Datasheet sections
- 1 Schematic diagram
- 2 Pin configuration
- 3 Typical application
- 4 Maximum ratings
- 5 Electrical characteristics
- 6 Application information
- 6.1 External capacitors
- 6.2 Power dissipation
- 6.3 Protection features
- 7 Typical performance characteristics
- 8 Package information
- 8.1 SOT23-5L package information
- 8.2 Packing information
- 9 Ordering information
Features
- Wide input voltage range : 2.5 V to 28 V
- Ultra-low quiescent current: typ. 5 µA at no-load, 10 µA max. across full temperature range
- Output voltage accuracy: ± 2%
- Output current up to 300 mA
- Fixed output voltage versions, starting from 1.2 V with 100 mV step
- Stable with low ESR capacitors (0.47 µF min.)
- Thermal shutdown protection
- Current limit protection
- -40 °C to +125 °C operating temperature range
Applications
- Post regulation
- Electronic meters
- Smoke detectors / alarms
- Portable equipment
- Industrial applications
Description
The ST732 is 300 mA LDO regulator, designed to be used in several medium voltage applications. Ultra-low quiescent current of 5 µA makes it suitable for applications permanently connected to power supply/battery. This feature is also useful when electronic modules remain permanently turned on. The ST732 embeds protection functions, such as: current limit, short-circuit and thermal shutdown. The extended input voltage range, very low drop voltage and low quiescent current features make it suitable also for low power after-market automotive and consumer applications. Maturity status link ST732 300 mA, 28 V low-dropout voltage regulator, with 5 µA quiescent current ST732 Datasheet DS12561 - Rev 3 - April 2021 For further information contact your local STMicroelectronics sales office.
1 Schematic diagram
Figure 1. Block diagram
2 Pin configuration
Figure 2. Pin connection (top view) Table 1. Pin description
1 GND Ground
2 VIN Input voltage
3 VOUT Regulated output voltage
3 Typical application
Figure 3. Typical application circuit
4 Maximum ratings
Table 2. Absolute maximum ratings operation under these conditions is not implied. All values are referred to GND. Table 3. Thermal data Note: R thJA based on 4-layer (2S2P) JEDEC test board constructed based on JESD 51-7 specification. Table 4. Electro static discharge
5 Electrical characteristics
TA = TJ = -40 °C to +125 °C, typical values refer to TA = +25 °C, VIN = VOUT + 1 V, IOUT =10 mA, CIN = 0.1 µF, COUT = 0.47 µF, unless otherwise specified (see note). Table 5. Electrical characteristics
- The device is able to properly regulate the output voltage with no load.
- Guaranteed by design, not tested in production.
- The current limit is a function of (V IN-VOUT) differential during operation. Maximum available current is limited. Refer to
Section 6.3 Protection features for more information. duty-cycle pulse techniques are used.
Electrical characteristics
6 Application information
6.1 External capacitors
The ST732 voltage regulator requires external capacitors to ensure the control loop stability. These capacitors must be selected to meet the requirements of minimum capacitance and equivalent series resistance defined in the following chapters. Input and output capacitors should be located as close as possible to the relevant pins. Input capacitor An input capacitor, whose minimum value is 0.1 μF, must be placed as close as possible to the input in of the device and returned to a clean analog ground. A good quality, low-ESR ceramic capacitor is suggested. It helps to ensure stability of the control loop, reduces the effects of inductive sources and improves ripple rejection. Values, which are higher than 0.1 µF, are suggested in case of fast load transients in the application. There is no maximum limit to the output capacitance. Output capacitor The ST732 requires a capacitor connected on its output, to keep the control loop stable and reduce the risk of ringing and oscillations. The control loop is designed to be stable with any good quality ceramic capacitor (such as X5R/X7R types) with a minimum value of 0.47 µF and equivalent series resistance in the [5 – 500 mΩ] range. It is important to highlight that the output capacitor must maintain its capacitance and ESR in the stable region over the full operating temperature, load and input voltage ranges, to assure stability. Therefore, capacitance and ESR variations must be taken into account in the design phase to ensure the device works in the expected stability region. There is no maximum limit to the output capacitance, provided that the above conditions are satisfied.
6.2 Power dissipation
A proper PCB design is recommended, to ensure that the device internal junction temperature is kept below 125 °C, in all operating conditions. The thermal energy, generated by the device, flows from the die surface to the PCB copper area through the package leads. The PCB copper area acts as a heat sink. The footprint copper pads should be as wider as possible to spread and dissipate heat to the surrounding environment. Thermal micro-vias to the inner or backside copper layers improve the overall thermal performance of the device. The power dissipation of the LDO depends on the input voltage, output voltage and output current, and is given by: P D = V I N − V O U T I OU T (1) The junction temperature of the device is: T J _ M A X = T A + R t ℎ J A × P D (2) where: TJ_MAX is the maximum junction of the die, 125 °C; TA is the ambient temperature; RthJA is the thermal resistance junction-to-ambient. With the above equation it is possible to calculate the allowable maximum power dissipation, therefore the maximum load current for a certain voltage drop. Appropriate de-rating of the operating condition can be applied accordingly.
6.3 Protection features
Due to the wide input voltage range, high power dissipation could occur in case of damaged/shorted load. For this reason the ST732 embeds an SOA protection-current limit circuit, which acts in case of overload or short-circuit on the output, clamping the load current to a safe value. The current limit value on purpose depends on the voltage drop (VIN - VOUT), so that the maximum dissipated power is always kept under control. The non-constant current limit characteristic shown in Figure 15. Current limit vs. temperature should be taken into account to calculate the maximum load current the device can supply for a certain dropout voltage. Normal operation is restored if the overload disappears, but prolonged operation in current limit may lead to high power dissipation inside the LDO and subsequently to thermal shutdown. ST732
Application information
An internal thermal feedback loop disables the output voltage if the die temperature reaches approximately 160 °C. This feature protects the device from excessive temperature that could lead to permanent damage to the LDO. Once the thermal protection is triggered and the device is shut down, normal operation is automatically recovered if the die temperature falls below 140 °C (thermal protection hysteresis of 20 °C typically). Continuous operation above the maximum ratings may lead to permanent damage to the device. In case of operations with strongly inductive loads, undershoots on the output may happen. If those negative spikes overcome the absolute maximum ratings of the device, permanent damage may occur. A Schottky diode connected in parallel to the output port reduces the risk of damages in such operating cases. ST732 Protection features DS12561 - Rev 3 page 8/21
7 Typical performance characteristics
CIN = COUT = 1 µF, VIN = 2.5 V, VOUT = 1.2 V, TJ = 25 °C, unless otherwise specified. Figure 4. Output voltage vs. temperature (IOUT = 0 mA) Figure 5. Output voltage vs. temperature (IOUT = 10 mA) Figure 6. Output voltage vs. temperature (IOUT = 150 mA) Figure 7. Output voltage vs. temperature (IOUT = 300 mA)
8 Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
8.1 SOT23-5L package information
Figure 22. SOT23-5L package outline Table 6. SOT23-5L package mechanical data
Package information
DS12561 - Rev 3 page 13/21
Figure 23. SOT23-5L recommended footprint
8.2 Packing information
Figure 24. SOT23-5L tape and reel drawing
Table 7. SOT23-5L tape and reel mechanical data
9 Ordering information
Table 8. Order code Note: Other voltage options available on request.
Ordering information
DS12561 - Rev 3 page 16/21
Revision history
Table 9. Document revision history 03-May-2018 1 Initial release. 16-Jun-2020 2 Updated Order code.