ST3M01

ST3M01 STMICROELECTRONICS | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 11

Technical content

■ ONLY TWO CELL NEED AS INPUT ■ THREE REGULATED OUTPUT 1) HIGH EFFICENCY PFM DC/DC CONVERTER 3.3V AT 200mA (87% EFFICENCY) 2) VERY LOW NOISE AND VERY LOW DROP V REG (3V AT 20mA) 3) VERY LOW NOISE AAND VERY LOW DROP V REG (1.9V AT 20mA) ■ LOGIC CONTROLLED ELECTRONIC SHUTDOWN ■ LOW BATTERY DETECTOR ■ VIRTUAL GND PIN ■ TEMPERATURA RANGE: -40 TO 85°C ST3M01 TRIPLE VOLTAGE REGULATOR SHDN DC/DC Linear A Linear B IN_Linear OUT DC/DC OUT LA OUT LB 150 µF 1 µF 15 µH DC/DC RefRef Vref Lx Virtual GND 100 nF GND_SW GND_Signal IN_SW Vin 150 µF 1 µF 1 KΩ LBO On-Mode Off-Mode SCHEMATIC DIAGRAM SO-14

Symbol Parameter Value Unit VIN DC Input Voltage (Both IN_Linear and IN_SW) -0.3 to 7 V VSHDN Shutdown Input Voltage -0.3 to V IN+0.3 V VLX Switch Voltage -0.3 to 7 V VLBO Low Battery Output Voltage -0.3 to 7 V Vvirtual_GNDVirtual GND Output Voltage -0.3 to 7 V ILBO Low Battery Output Maximum Current 30 mA Ivirtual_GND Virtual GND Output Maximum Current 30 mA Tstg Storage Temperature Range -65 to +150 °C Top Operating Junction Temperature Range -40 to +85 °C Symbol Parameter Value Unit R thj-amb Thermal Resistance Junction-ambient (*) 160 °C/W Type Package Comment ST3M01D SO-14 50 parts per tube / 20 tube per box ST3M01DTR SO-14 (Tape & Reel) 2500 parts per reel

CONNECTION DIAGRAM (top view) PIN DESCRIPTION Pin N° Symbol Name and Function 1 GND SW Switching Ground. Must be low impedance; solder directly to GND plane 2 GND SW Switching Ground. Must be low impedance; solder directly to GND plane 3 Virtual GND Virtual GND. Open Drain N-Cnannel MOSFET: must be high impedance when the Low Battery condition is detected. 4 LBO Low Battery Output. Open Drain N-Cnannel MOSFET: sinks current when the input voltage drops below 2V typically. REF Reference Voltage Output. Bypass with 0.1 µF to improve the linears VREF thermal noise performance. 6 IN Linear Linear Input. Must be connected togheter with IN SW to the input supply. 7O U T L B Linear B Output port. 1.9V typically. 8 SHDN Shutdown Input. Disables the SMPS and LA output, but the LB, the referencevoltage and the low batery comparator remain active. 9 GND Signal Signal GND. Must be connected togheter with the Switching Ground. 10 OUT L A Linear A Output port. 3V typically. 11 OUT DC/DC DC/DC Output Port: 3.3V typically. 12 IN SW SMPS Input. Must be connected togheter with IN_Linear to the input supply. 13 LX 1.5A N-Channel Power MOSFET Drain. 14 LX 1.5A N-Channel Power MOSFET Drain.

ELECTRICAL CHARACTERISTICS (Unless otherwise specified, please refer to the typical operating circut of the pag 1 for the external components values and connections. Unless otherwise noted VSHDN =HIGH) Note 1: For VIN < 1.9V the VO(LB) is out of regulation because of under dropout condition Note 2: VO(DC/DC) = 3.5V force for an external DC source to avoid switching noise Symbol Parameter Test Conditions Min. Typ. Max. Unit VI Operating Input Voltage 1.9 3.3 V VO(DC/DC) DC/DC Converter Output Voltage (Test Circuit A) 2.24<VIN<3.3V; 0<I O(DC/DC) <200mA; 0<IO(LA)<20mA; 0<I O(LB)<20mA; -40 < TJ < 85 °C 3.2 3.3 3.415 V ν DC/DC Converter Efficency VIN=2.4V; I O(DC/DC) =100mA; IO(LA)=0mA; IO(LB)=0mA; T J = 25°C 87 % VO(LA) Linear A Output Voltage (Test Circuit A) 2.24<VIN<3.3V; 0<I O(DC/DC) <200mA; 0<IO(LA)<20mA; 0<I O(LB)<20mA; -40 < TJ < 85°C 2.93 3 3.09 V VO(LB) Linear B Output Voltage (Test Circuit A) 2.24<VIN<3.3V; 0<I O(DC/DC) <200mA; 0<IO(LA)<20mA; 0<I O(LB)<20mA; -40 < TJ < 85°C 1.86 1.9 1.955 V eN(LA) Linear A Thermal Output Noise Voltage (Note 2) VIN=2.4V; V O(DC/DC) =3.5V; IO(LA)=20mA; 10 < f < 80KHz; C O(LA)=1µF; CREF =0.1µF; TJ = 25°C 60 µVrms eN(LB) Linear B Thermal Output Noise Voltage (Note 2) VIN=2.4V; V O(DC/DC) =3.5V; IO(LB)=20mA; 10 < f < 80KHz; C O(LB)=1µF; CREF =0.1µF; TJ = 25°C 35 µVrms Iq(OFF) Quiescent Current OFF Mode DC/DC & LA OFF LB ON) (Test Circuit E) VIN=3.3V; No Load; V SHDN =LOW; TJ = 25°C 75 µA Iq(OFF) Quiescent Current OFF Mode (DC/DC & LA OFF LB ON) (Test Circuit F) VIN=1.9V; No Load; V SHDN =HIGH; TJ = 25°C 50 µA IS(DC/DC) DC/DC Supply Current (Test Circuit B) VIN=2.24V; No Load; T J = 25°C 100 µA Iq(LA) Linear A Quiescent Current (Test Circuit C) VIN=2.24V; V O(DC/DC) =3.5V; IO(LA)=10mA; TJ = 25°C 220 µA Iq(LB) Linear B Quiescent Current (Test Circuit C) VIN=2.24V; V O(DC/DC) =3.5V; IO(LB)=10mA; TJ = 25°C 75 µA VBATT Low Battery Detection Range VSHDN =HIGH with falling edge 1.96 2 2.04 V VBATT(HYS) Low Battery Detection Hysteresys 150 200 mV R ON(LBO) LBO R DSON VIN=1.9V; I D =5mA; T J = 25°C 10 Ω Vih Control Input Logic Low VIN>2.24V; -40 < TJ < 85°C 0.4 V Vil Control Input Logic High VIN>2.24V; -40 < TJ < 85°C 1.5 V Ton Timer On Response Time on DC/DC VIN=2.4V; C O =100µF; T J = 25°C IO(DC/DC) =200mA VSHDN =from GND to VSHDN(MAX) 0.6 9 ms R ON(V_GND) Virtual GND RDSON V IN>2.24V; ID =5mA; T J = 25°C 10 Ω

DC/DC CONVERTER BLOCK DIAGRAM LINEAR VREG BLOCK DIAGRAM

IN_Linear OUT DC/DC OUT LA OUT LB 150 µF 1 µF 15 µH DC/DC RefRef Vref Lx Virtual GND 0.1 µF GND_SW GND_Signal IN_SW Vin 150 µF 1 µF 1 KΩ LBO On-Mode Off-Mode V V V DC/DC Linear A Linear B OUT DC/DC OUT LA OUT LB 1 µF 15 µH SHDN=HIGH 150 µF DC/DC RefRef Vref Lx LBO Virtual GND 0.1 µF GND_SW GND_Signal IN_SW Vin 47 µF 1 µF 1 KΩ A (Isup)DC/DC 47 µF IN_Linear

TEST CIRCUIT C (Iq)Ia=(Iin)Ia-(Iout)Ia TEST CIRCUIT D (Iq)Ib=(Iin)Ib-(Iout)Ib (Iout)la (Iin)la DC/DC Linear A Linear B OUT DC/DC OUT LA OUT LB 1 µF 15 µH SHDN=HIGH DC/DC RefRef Vref Lx LBO Virtual GND 0.1 µF GND_SW GND_Signal IN_SW (Vin)Lin=2.24V 47 µF 1 µF 1 KΩ 47 µF IN_Linear (Vin)DC/DC Floating A (Vout)DC/DC=3.5V (Iout)lb (Iin)lb DC/DC Linear A Linear B OUT DC/DC OUT LA OUT LB 1 µF 15 µH SHDN=LOW DC/DC RefRef Vref Lx LBO Virtual GND 0.1 µF GND_SW GND_Signal IN_SW(Vin)Lin=3.3V 47 µF 1 µF 1 KΩ 47 µF IN_Linear (Vin)DC/DC Floating A 150 µF

SHDN= LOW DC/DC Linear A Linear B IN_Linear OUT DC/DC OUT LA OUT LB 150 µF 1 µF 15 µH DC/DC RefRef Vref Lx Virtual GND 0.1 µF GND_SW GND_Signal IN_SW Vin = 3.3V 150 µF 1 µF 1 KΩ LBO A Iq = off SHDN=HIGH DC/DC Linear A Linear B IN_Linear OUT DC/DC OUT LA OUT LB 150 µF 1 µF 15 µH DC/DC RefRef Vref Lx Virtual GND 0.1 µF GND_SW GND_Signal IN_SW Vin = 1.9V 150 µF 1 µF 1 KΩ LBO A Iq = off

IN_SW LX OUT_DC/DC OUT_L B Virtual_GND LBO VrefGND_SignalGND_SW SHDN IN_Linear ST3M01 OUT_L A 12 13,14 11 150 µF IN D STPS320U L 22 µH 150 µF 1 µF 1 µF B A 100 nF LBO VG 591,2 SH DC 1KOhm VR ON OFF

DIM. mm inch A1 . 7 5 0 . 0 6 8 a1 0.1 0.2 0.003 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C0 . 5 0 . 0 1 9 c1 45 (typ.) D 8.55 8.75 0.336 0.344 E 5.8 6.2 0.228 0.244 e1 . 2 7 0 . 0 5 0 e3 7.62 0.300 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M0 . 6 8 0 . 0 2 6 S8 ( m a x . ) P013G SO-14 MECHANICAL DATA

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2000 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com