ST3L01

Triple voltage regulator

Document overview

• Manufacturer or author: STMicroelectronics
• PDF pages: 12

Technical content

■ DUAL INPUT VOLTAGE (12V AND 5V) ■ TRIPLE OUTPUT VOLTAGE (2.6V, 3.3V, 8V) ■ 2.6V GUARANTEED I OUT UP TO 1.2A ■ 3.3V GUARANTEED I OUT UP TO 1.0A ■ 8V GUARANTEED I OUT UP TO 200mA ■ THERMAL AND SHORT CIRCUIT PROTECTION ■ GUARANTEED OPERATING TEMPERATURE RANGE (0°C to 125°C)

DESCRIPTION

This device contains three voltage regulators, all fixed output voltage, in one 7 pin surface mount package. The first is a 2.6 V regulator to power the integrated controller/µP. The second is a 3.3V regulator to power the read channel chip, and memory chips requiring 3.3V The last is an 8V regulator to power the preamp chip. The bandgap reference, the 8V ground, and the substrate are all tied to a common ground pin, while the 2.6V and 3.3V ground is tied to a separate ground pin.This grounding scheme allows for improved noise isolation between the 8V regulator and the 2.6V and 3.3V regulators.The 2.6V and 3.3V regulators shall be respectively capable of 1.0A and 1.2A. The 8V regulator shall be capable of 200mA. It is housed in the SPAK (PowerFlex ) ST3L01 TRIPLE VOLTAGE REGULATOR V2.6 SCHEMATIC DIAGRAM SPAK-7L (PowerFlex ) Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s)

Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) ST3L01 ABSOLUTE MAXIMUM RATINGS GENERAL OPERATING CONDITION THERMAL DATA CONNECTION DIAGRAM (top view) PIN DESCRIPTION

ORDERING INFORMATION

(*) Available in Tape & Reel with the suffix "R" Symbol Parameter Value Unit VCC Supply Voltage 18 V VDD ISupply Voltage 18 V VESD ESD Tolerance (Human Body Model) 4K V Tstg Storage Temperature Range -65 to +150 °C TJ Operating Junction Temperature Range 0 to +150 °C Symbol Parameter Value Unit VCC VCC Supply Voltage 4.75 to 5.25 V ΔVCC VCC Ripple ±0.15 V tr Rise Time (10% to 90%) referred to VCC 1V tf Fall Time (90% to 10%) referred to VCC 1V VDD VDD Supply Voltage 10.8 to 13.2 V ΔVDD VDD Ripple ±0.3 V tr Rise Time (10% to 90%) referred to VDD 1V tf Fall Time (90% to 10%) referred to VDD 1V TAl Operating Ambient Temperature Range 0 to 70 µs Symbol Parameter SPAK-7L Unit R thj-case Thermal Resistance Junction-case 2 °C/W SPAK-7L Pin N° Symbol Name and Function

1 GND 1,2 VO1 and VO2 regulators GND pin

2V O2 Second Output Pin: Bypass with a 0.1µF capacitor to GND 3V CC Input Pin: Bypass with a 0.1µF capacitor to GND 4G N D 3 VO3 regulators GND pin 5V O3 Third Output Pin: Bypass with a 0.1µF capacitor to GND 6V DD Input Pin: Bypass with a 0.1µF capacitor to GND 7V O1 First Output Pin: Bypass with a 0.1µF capacitor to GND TYPE SPAK (Power Flex  ) 7 leads (*) ST3L01 ST3L01K7

Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) ST3L01 TYPICAL APPLICATION CIRCUIT Note: To improve noise figure of the 8V VREG connect this capacitor to the GND8V pin. CCC , CDD , CO1 , CO2 and CO3 capacitors must be located not more than 0.5" from the output pins of the device. Form more details about Capacitors read the "Application Hints" ELECTRICAL CHARACTERISTICS (VCC =5V, VDD =12V, CCC =1µF (Tantalum), CDD =0.1µF (X7R), C O1 =C O2 =C O3 =0.11µF (X7R) Tj=0 to 125°C unless otherwise specified. Typical values are referred at Tj=25°C, IFL1 =1.2A, IFL2 =1.0A, IFL3 =0.2A, Symbol Parameter Test Conditions Min. Typ. Max. Unit VO1 Output Voltage 1 I O1 = 10mA T j = 25°C 2.575 2.6 2.626 V IO1 = 0 to IFL1 V CC = 4.75 to 5.25V Tj = 0 to 125°C 2.55 2.6 2.65 VDD = 0 to 10.8V IO1 = 0.5A 2.2 2.65 VO2 Output Voltage 2 I O2 = 10mA T j = 25°C 3.23 3.3 3.37 V IO2 = 0 to IFL2 V CC = 4.75 to 5.25V Tj = 0 to 125°C 3.2 3.3 3.4 VDD = 0 to 10.8V IO2 = 0.5A 2.92 3.4 VO3 Output Voltage 3 I O3 = 10mA T j = 25°C 7.84 8 8.16 V IO3 = 0 to IFL3 V DD = 10.8 to 13.2V Tj = 0 to 125°C 7.76 8 8.24 ΔVO Line Regulation 1 I O = 10mA VCC =±5% VDD =±10% <0.2 %V O ΔVO Load Regulation 1 I O = 0.01 to IFL (Note 1) <0.4 %V O VD1 Dropout Voltage 1 I O1 = IFL1 (Note 2) 1.3 1.9 V VD2 Dropout Voltage 2 I O2 = IFL2 (Note 2) 1.13 1.4 V VD3 Dropout Voltage 3 I O3 = IFL3 (Note 2) 1.6 2.2 V tTR Transient Response (Note 3, 7) <1 µs IOL1 Output 1 Current Limit Δ VO = 125mV 1.5 2.1 2.5 A IOL2 Output 2 Current Limit Δ VO = 165mV 1.1 1.7 2.5 A IOL3 Output 3 Current Limit Δ VOUT = 400mV 0.25 0.4 0.5 A IO1 Output 1 Minimum Load Current (Note 4, 7) 0 mA IO2 Output 2 Minimum Load Current (Note 4, 7) 0 mA IO3 Output 3 Minimum Load Current (Note 4, 7) 0 mA

Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) ST3L01 Note 1: Low duty cycle pulse testing with Kelvin connections are required in order to maintain accurate data Note 2: Dropout Voltage is defined as the minimum differential voltage between VI and VO required to mantain regulation at VO . It is measured when the output voltage drops 100mV below its nominal value. Note 3: Transient response is defined with a step change in load from 10mA to IFL/2 as the time from the load step until the output voltage reaches it’s minimum value. Note 4: Minimum load current is defined as the minimum current required at the output in order to maintain regulation for the output voltage. Note 5: The regulator shall withstand 100000 reverse bias discharges of the maximum output capacitance, with no degradation, when the input voltage is switched to ground in 1 µs. Note 6: Temperature stability is the change in output from nominal over the operating temperature range. Note 7: Guaranteed by design, not tested in production. APPLICATION HINTS EXTERNAL CAPACITORS The ST3L01 requires external capacitors for stability. We suggest to solder both capacitors as close as possible to the relative pins. INPUT CAPACITORS An input capacitor, whose value is at least 0.1µF, is required on the VDD input; the amount of the input capacitance can be increased without limit. Any good quality tantalum or ceramic low ESR capacitor may be used at the V DD input. Any input capacitor, whose value is at least 1m F is instead required on the VCC input; the amount of this input capacitance can be increased without limit. Tantalum or aluminum electrolitic capacitor can be used at the V CC input; ceramic, low ESR capacitor are not recommended. Both capacitors must be located at a distance of not modre than 0.5" from the input pins of the device and returned to a clean analog ground. OUTPUT CAPACITOR The ST3L01 is designed specifically to work with Ceramic and Tantalum capacitors. The test results of the ST3L01 stability using multilayer ceramic capacitors show that a minimum value of 0.1µF is needed for the three regulators. This value can be increased for even better transient response and noise performance. Surface-mountable solid tantalum capacitors offer a good combination of small physical size for the capacitance value and ESR in the range need by the ST3L01. The test results show good stability for both outputs with values of at least 0.1µF. Also this capacitor value can be increased without limit for even better performance such a transient response and noise. IMPORTANT ; The output capacitor must maintain its ESR in the stable region over the full operating temperature to assure stability. Also , capacitor tolerance and variation with temperature must be considered to assure that the minimum amount of capacitance is provided at all times. For this reason, when a caramic multilayer capacitor is used, the better choise for temperature coefficent is the X7R type, which holds the capacitance within ±15% . The output capacitor should be located not more than 0.5" from the output pins of the device and returned to a clean analog ground. C O Output Capacitor (Note 5, 7) 0.1 µF C CC Input Capacitor (Note 5) 1.0 µF C DD Input Capacitor (Note 5) 0.1 µF Reg Therm Therma Regulation I OUT = IFL, t PULSE = 30ms (Note 7) 0.1 0.3 %/W SVR1 Supply Voltage Rejection (VCC to Output 1) B = 100Hz to 100KHz I O1 = IFL1/10 VCC = 4.75 to 5.25V (Note 7) 30 >40 dB SVR2 Supply Voltage Rejection (VCC to Output 2) B = 100Hz to 100KHz I O2 = IFL2/10 VCC = 4.75 to 5.25V (Note 7) 30 >40 dB SVR3 Supply Voltage Rejection (VDD to Output 3) B = 100Hz to 100KHz I O3 = IFL3/10 VDD = 10.8 to 13.2V (Note 7) 40 >50 dB IVCC VCC Quiescent Current IO1 = IO2 = IO3 = 0 7 10 mA IVDD VDD Quiescent Current IO1 = IO2 = IO3 = 0 13 20 mA eN Output Noise B = 10Hz to 10KHz (Note 7) 0.003 %V OUT ΔVO Temperature Stability I O = 10mA (Note 6, 7) 0.5 %V OUT ΔVO Long Term Stability T j = 125°C, 1000Hrs (Note 7) 0.3 %V OUT Symbol Parameter Test Conditions Min. Typ. Max. Unit

Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) ST3L01 DIM. mm. inch A 1.78 2.03 0.070 0.080 A2 0.03 0.13 0.001 0.005 C 0.25 0.010 C1 0.25 0.010 D 1.02 1.27 0.040 0.050 D1 7.87 8.13 0.310 0.320 F 0.63 0.79 0.025 0.031 G 1.27 0.050 G1 7.62 0.3 H1 5.59 0.220 H2 9.27 9.52 0.365 0.375 H3 8.89 9.14 0.350 0.360 L 10.41 10.67 0.410 0.420 L1 7.49 0.295 L2 8.89 9.14 0.350 0.360 M 0.79 1.04 0.031 0.041 N 0.25 0.010 V3 ˚ 6 ˚3 ˚ 6 ˚ SPAK-7L MECHANICAL DATA PO13F2/A

Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) ST3L01 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com