SSU40N01

SSU40N01 SECOS | Alldatasheet

Document overview

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Technical content

149A , 40V , R DS(ON) 2.2mΩ N-Ch Enhancement Mode Power MOSFET 25-Mar-2015 Rev. A Page 1 of 4 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. TO -263 40N01 /box4/box4/box4/box4 /box4/box4/box4/box4 /box4/box4/box4/box4 /box4/box4/box4/box4 RoHS Compliant Product A suffix of “-C” specifies halogen free

DESCRIPTION

The SSU40n01 is the highest performance trench N-ch MOSFETs with extreme high cell density , which provide excellent R DS(ON) and gate charge for most of the synchronous buck converter applications .

FEATURES

/circle6 Advanced high cell density Trench technology /circle6 Super Low Gate Charge /circle6 Excellent CdV/dt effect decline /circle6 100% EAS and 100% Rg Guaranteed /circle6 Green Device Available MARKING

PACKAGE INFORMATION

TO-263 0.8K 13 inch ABSOLUTE MAXIMUM RATINGS (T A=25° C unless otherwise specified) Parameter Symbol Rating Unit Drain-Source Voltage VDS 40 V Gate-Source Voltage VGS ±20 V TC =25° C 149 TC =70° C 119 TA=25° C 30 Continuous Drain Current 1 TA=70° C ID A Pulsed Drain Current 1 IDM 480 A TC =25° C 83 Total Power Dissipation TA=25° C PD W Single Pulse Avalanche Energy, L=0.1mH E AS 201 mJ Single Pulse Avalanche Current, L=0.1mH I AS 63.5 A Operating Junction and Storage Temperature Range TJ, T STG -55~150 ° C Thermal Resistance Rating Maximum Thermal Resistance Junction-Ambient 2 R θJA 62 ° C / W Maximum Thermal Resistance Junction-Case 2 R θJC 1.5 ° C / W Gate Source Drain Date Code A 4.40 4.80 c2 1.17 1.45 b 0.76 1.00 b2 1.1 1.47 L4 0.00 0.30 D 8.5 9.0 c 0.36 0.5 e 2.54 REF L3 1.50 REF L 14.6 15.8 L1 2.29 2.79 θ 0° 8° E 9.80 10.4 L2 1. 27 REF

149A , 40V , R DS(ON) 2.2mΩ N-Ch Enhancement Mode Power MOSFET 25-Mar-2015 Rev. A Page 2 of 4 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually.

ELECTRICAL CHARACTERISTICS

(T J=25° C unless otherwise specified) Parameter Symbol Min. Typ. Max. Unit Teat Conditions Static Drain-Source Breakdown Voltage BV DSS 40 - - V V GS =0, I D =250 µA Gate-Threshold Voltage V GS(th) 2 3 4 V V DS =V GS , I D =250 µA Gate-Source Leakage Current I GSS - - ±100 nA V GS = ±20V Drain-Source Leakage Current I DSS - - 1 µA V DS =32V, V GS =0 Static Drain-Source On-Resistance 2 R DS(ON) - 1.9 2.2 m Ω V GS =10V, I D =30A Total Gate Charge Q g - 78.8 - Gate-Source Charge Q gs - 23 - Gate-Drain (“Miller”) Change Q gd - 4.85 - nC ID =30A VDS =20V VGS =10V Turn-on Delay Time T d(on) - 21 - Rise Time Tr - 6 - Turn-off Delay Time T d(off) - 98 - Fall Time Tf - 17 - nS VDS =20V ID =30A VGS =10V R G =3 Ω Input Capacitance C iss - 4222 - Output Capacitance C oss - 889 - Reverse Transfer Capacitance C rss - 398 - pF VGS =0 VDS =20V f =1.0MHz Guaranteed Avalanche Characteristics Single Pulse Avalanche Energy 3 EAS 110 - - mJ V DD =20V,L=0.1mH , I AS =47A Source-Drain Diode Diode Forward Voltage V SD - - 1.3 V I S=30A, V GS =0 Reverse Recovery Time T rr - 32 - ns Reverse Recovery Charge Q rr - 120 - nC IF=30A, T J = 25° C dI/dt=100A/ µs Notes: 1. The data tested by pulsed, pulse width ≦ 300us, duty cycle ≦ 2%. 2. R θJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θJC is guaranteed by design while R θCA is determined by the user's board design. R θJA shown below for single device operation on FR-4 in still air. 3. The Min. value is 100% EAS tested guarantee

149A , 40V , R DS(ON) 2.2mΩ N-Ch Enhancement Mode Power MOSFET 25-Mar-2015 Rev. A Page 3 of 4 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. CHARACTERISTIC CURVES

149A , 40V , R DS(ON) 2.2mΩ N-Ch Enhancement Mode Power MOSFET 25-Mar-2015 Rev. A Page 4 of 4 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. CHARACTERISTIC CURVES