DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 2

Technical content

-10 A, -60 V , RDS(ON) 45 m P-Channel Enhancement MOSFET 18-Sep-2013 Rev. B Page 1 of 2 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. RoHS Compliant Product A suffix of “-C” specifies halogen & lead-free

DESCRIPTION

These miniature surface mount MOSFETs utilize a high cell density trench process to provide low RDS(on) and to ensure minimal power loss and heat dissipation.

FEATURES

 Low RDS(on) provides higher efficiency and extends battery life.  Low thermal impedance copper leadframe SOP-8PP saves board space.  Fast switching speed.  High performance trench technology. APPLICATION DC-DC converters and power management in portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones.

PACKAGE INFORMATION

ABSOLUTE MAXIMUM RATINGS (TA=25°C unless otherwise specified) Parameter Symbol Rating Unit Drain-Source Voltage VDS -60 V Gate-Source Voltage V GS ±20 V TA=25°C -10 Continuous Drain Current 1 TA=70°C ID A Pulsed Drain Current 2 I DM ±50 A Continuous Source Current (Diode Conduction) 1 I S -2.1 A TA=25°C 5.0 Power Dissipation 1 TA=70°C PD 3.2 W Operating Junction and Storage Temperature Range TJ, TSTG -55 ~ 150 °C Thermal Resistance Rating t≦10 sec 25 Maximum Junction to Ambient 1 Steady-State RθJA °C / W Notes 1. Surface Mounted on 1” x 1” FR4 Board. 2. Pulse width limited by maximum junction temperature. S S S GD D D D A 0.85 1.00 θ 0 ° 10 ° B 5.3 BSC. b 5.2 BCS C 0.15 0.25 c 0.30 0.50 D 3.8 BCS. d 1.27BSC E 6.05 BCS. e 5.55 BCS. F 0.03 0.30 f 0.10 0.40 G 4.35 BCS. g 1.2 BCS. L 0.40 0.70 SOP-8PP

-10 A, -60 V , RDS(ON) 45 m P-Channel Enhancement MOSFET 18-Sep-2013 Rev. B Page 2 of 2 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. ELECTRICAL CHARACTERISTICS (T A=25°C unless otherwise specified) Parameter Symbol Min. Typ. Max. Unit Teat Conditions Static Gate-Threshold Voltage V GS(th) -1 - - V V DS = VGS, ID = -250μA Gate-Body Leakage I GSS - - ±100 nA V DS = 0V, VGS= ±25V - - -1 V DS = -48V, VGS= 0V Zero Gate Voltage Drain Current I DSS - - -5 μA VDS = -48V, VGS= 0V, TJ=55°C On-State Drain Current 1 I D(ON) -50 - - A V DS = -5V, VGS= -10V - - 45 V GS= -10V, ID = -9A Drain-Source On-Resistance 1 R DS(ON) - - 60 mΩ VGS= -4.5V, ID = -7.2A Forward Transconductance 1 g FS - 31 - S V DS= -15V,,ID = -9A Diode Forward Voltage V SD - -0.7 - V I S= 2.1A, VGS= 0V Dynamic 2 Total Gate Charge Q g - 15.3 - Gate-Source Charge Q gs - 5.2 - Gate-Drain Charge Q gd - 5.8 - nC ID= -9A VDS= -15V VGS= -4.5V Turn-On Delay Time Td (ON) - 15 - Rise Time T r - 12 - Turn-Off Delay Time Td (OFF) - 62 - Fall Time T f - 46 - nS ID= -1A, VDD= -15V VGEN= -10V RL= 15Ω RG= 6Ω Notes 1. Pulse test ：PW ≦ 300 us duty cycle ≦ 2%. 2. Guaranteed by design, not s ubject to production testing.