DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 2
Technical content
15 A, 40 V , RDS(ON) 15 m
N-Channel Enhancement MOSFET 18-Sep-2013 Rev. B Page 1 of 2 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. RoHS Compliant Product A suffix of “-C” specifies halogen & lead-free
DESCRIPTION
These miniature surface mount MOSFETs utilize a high cell density trench process to provide low RDS(on) and to ensure minimal power loss and heat dissipation. Typical applications are DC-DC converters and power management in portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones.
FEATURES
Low R DS(on) provides higher efficiency and extends battery life. Low thermal impedance copper leadframe SOP-8PP saves board space. Fast switching speed. High performance trench technology.
PACKAGE INFORMATION
ABSOLUTE MAXIMUM RATINGS AND THERMAL DATA(TA = 25°C unless otherwise specified) Parameter Symbol Rating Unit Drain-Source Voltage VDS 40 V Gate-Source Voltage V GS 20 V TA=25°C 15 Continuous Drain Current 1 TA=70°C ID A Pulsed Drain Current 2 I DM 50 A Continuous Source Current (Diode Conduction) 1 I S 2.3 A TA=25°C 5.0 Power Dissipation 1 TA=70°C PD 3.2 W Operating Junction and Storage Temperature Range TJ, TSTG -55 ~ 150 °C Thermal Resistance Data t≦10 sec 25 Maximum Junction to Ambient 1 Steady-State RθJA °C / W Notes 1. Surface Mounted on 1” x 1” FR4 Board. 2. Pulse width limited by maximum junction temperature. A 0.85 1.00 θ 0 ° 10 ° B 5.3 BSC. b 5.2 BCS C 0.15 0.25 c 0.30 0.50 D 3.8 BCS. d 1.27BSC E 6.05 BCS. e 5.55 BCS. F 0.03 0.30 f 0.10 0.40 G 4.35 BCS. g 1.2 BCS. L 0.40 0.70 SOP-8PP
N-Channel Enhancement MOSFET 18-Sep-2013 Rev. B Page 2 of 2 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. ELECTRICAL CHARACTERISTICS (T A=25°C unless otherwise specified) Parameter Symbol Min Typ Max Unit Test conditions Static Gate-Threshold Voltage V GS(th) 1 - - V V DS = VGS, ID = 250μA Gate-Body Leakage I GSS - - ±100 nA V DS = 0V, VGS= 20V - - 1 V DS = 32V, VGS= 0V Zero Gate Voltage Drain Current I DSS - - 25 μA VDS = 32V, VGS= 0V, TJ=55°C On-State Drain Current 1 I D(ON) 34 - - A V DS = 5V, VGS= 10V - - 15 V GS= 10V, ID = 7.5A Drain-Source On-Resistance 1 R DS(ON) - - 18 mΩ VGS= 4.5V, ID = 7A Forward Transconductance 1 g FS - 22 - S V DS= 15V,,ID = 7.5A Diode Forward Voltage V SD - 1.1 - V I S= 2.1A, VGS= 0V Dynamic 2 Total Gate Charge Q g - 4.0 - Gate-Source Charge Q gs - 1.1 - Gate-Drain Charge Q gd - 1.4 - nC ID= 7.5A VDS= 15V VGS= 4.5V Turn-On Delay Time Td (ON) - 16 - Rise Time T r - 5 - Turn-Off Delay Time Td (OFF) - 23 - Fall Time T f - 3 - nS ID= 34A, VDD= 25V VGEN= 10V RL= 25Ω Notes 1. Pulse test ：PW ≦ 300 us duty cycle ≦ 2%. 2. Guaranteed by design, not s ubject to production testing.