SSM9960M

SSM9960M SSC | Alldatasheet

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Technical content

www.SiliconStandard.com 1 of 6 DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS Simple drive requirement BV DSS 40V Lower gate charge R DS(ON) 20mΩ Fast switching characteristics ID 7.8A

Description

ID @ TA=25°C ID @ TA=100°C IDM A PD @ TA=25°C W/°C TSTG TJ Symbol Value Unit Rthj-a Thermal Resistance Junction-ambient3 Max. 62.5 °C/W Rating 7.8 A Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current3 6.2 A Pulsed Drain Current1 20 2 W -55 to 150 °C Operating Junction Temperature Range -55 to 150 °C Linear Derating Factor 0.016 Storage Temperature Range Thermal Data Parameter Total Power Dissipation ± 20 Advanced Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SSM9960M is in the SO-8 package, which is widely preferred for commercial and industrial surface mount applications, and is well suited for low voltage applications such as DC/DC converters. SO-8 SSM9960M/GM 8/21/2004 Rev.2.01 This device is available with Pb-free lead finish (second-level interconnect) as SSM9960GM.

www.SiliconStandard.com 2 of 6 SSM9960M/GM 8/21/2004 Rev.2.01 Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage V GS=0V, ID=250uA 40 - - V Δ BVDSS/Δ Tj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA - 0.032 -V/°C RDS(ON) Static Drain-Source On-Resistance2 VGS=10V, ID=7A - - 20 mΩ VGS=4.5V, ID=5A - - 32 mΩ VGS(th) Gate Threshold Voltage VDS=VGS, ID=250uA 1 - 3 V gfs Forward Transconductance VDS=10V, ID=7A - 25 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=40V, VGS=0V - - 1 uA Drain-Source Leakage Current (Tj=70oC) VDS=32V ,VGS=0V - - 25 uA IGSS Gate-Source Leakage VGS= ± 20V - - ±100 nA Qg Total Gate Charge2 ID=7A - 14.7 - nC Qgs Gate-Source Charge VDS=20V - 7.1 - nC Qgd Gate-Drain ("Miller") Charge V GS=4.5V - 6.8 - nC td(on) Turn-on Delay Time2 VDS=20V - 11.5 - ns tr Rise Time ID=1A - 6.3 - ns td(off) Turn-off Delay Time RG=3.3Ω ,VGS=10V - 28.2 - ns tf Fall Time RD=20Ω - 12.6 - ns Ciss Input Capacitance VGS=0V - 1725 - pF Coss Output Capacitance VDS=25V - 235 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 145 - pF Source-Drain Diode Symbol Parameter Test Conditions Min. Typ. Max. Units IS Continuous Source Current ( Body Diode ) VD=VG=0V , VS=1.3V - - 1.54 A VSD Forward On Voltage2 Tj=25°C, IS=2.3A, VGS=0V - - 1.3 V Notes: 1.Pulse width limited by max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 i n2 copper pad of FR4 board ; 135°C/W when mounted on min. copper pad.

www.SiliconStandard.com 3 of 6 SSM9960M/GM 8/21/2004 Rev.2.01 Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 01234 V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) T C =150 o C 10V 6.0V 5.0V 4.5V V GS =4.0V 01234 V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) T C =25 o C 10V 6.0V 5.0V 4.5V V GS =4.0V 0.2 0.8 1.4 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized RDS(ON) I D =7.0A V GS =10V 24681 01 2 V GS (V) RDS(ON) (mΩ ) I D =7.0A T C =25°C

www.SiliconStandard.com 4 of 6 SSM9960M/GM 8/21/2004 Rev.2.01 Fig 5. Maximum Drain Current vs. Fig 6. Typical Power Dissipation Case Temperature Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance 0.01 0.1 100 0.1 100 V DS (V) ID (A) T C =25 o C Single Pulse 1ms 10ms 100ms 10s DC 0.001 0.01 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 t , Pulse Width (s) Normalized Thermal Response (R thja) PDM Duty Factor = t/T Peak Tj = PDM x Rthja + Ta Rthja=135oC/W t T 0.02 0.01 0.05 0.1 0.2 Duty Factor = 0.5 Single Pulse 25 50 75 100 125 150 T c , Case Temperature ( o C) ID , Drain Current (A) 0.8 1.6 2.4 0 50 100 150 T c , Case Temperature ( o C) PD (W)

www.SiliconStandard.com 5 of 6 SSM9960M/GM 8/21/2004 Rev.2.01 Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics Fig 11. Forward Characteristic of Fig 12. Gate Threshold Voltage vs. Reverse Diode Junction Temperature 0.5 1.5 2.5 3.5 -50 100 150 T j , Junction Temperature ( o C ) VGS(th) (V) Q G , Total Gate Charge (nC) VGS , Gate to Source Voltage (V) I D =7.0A VDS =12V VDS =16V VDS =20V 100 1000 10000 V DS (V) C (pF) f=1.0MHz Ciss Coss Crss 0.01 0.1 100 0.4 0.8 1.2 V SD (V) IS(A) Tj=25 o C Tj=150 o C

Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expre ss or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. www.SiliconStandard.com 6 of 6 SSM9960M/GM 8/21/2004 Rev.2.01 Fig 13. Switching Time Circuit Fig 14. Switching Time Waveform Fig 15. Gate Charge Circuit Fig 16. Gate Charge Waveform td(on) tr td(off) tf VDS VGS 10% 90% Q VG 4.5V QGS QGD QG Charge 0.5 x RATED VDS TO THE OSCILLOSCOPE D G S VDS VGS I D I G 1~ 3 mA 0.5 x RATED VDS TO THE OSCILLOSCOPE 10 v D G S VDS VGS RG RD