SSM9926GEO SSC | Alldatasheet

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www.SiliconStandard.com 1 of 6 SSM9926GEO N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS Low on-resistance BVDSS 20V Capable of 2.5V gate drive RDS(ON) 28mΩ Low drive current I D 4.6A Surface-mount package

Description

ID @ TA=25°C ID @ TA=70°C IDM A PD @ TA=25°C W/°C TSTG TJ Symbol Value Unit Rthj-amb Thermal Resistance Junction-ambient Max. 125 °C/W Thermal Data Parameter Storage Temperature Range Total Power Dissipation 1 W -55 to 150 °C Operating Junction Temperature Range -55 to 150 °C Linear Derating Factor 0.008 Continuous Drain Current3 3.7 A Pulsed Drain Current1,2 20 Gate-Source Voltage ± 12 Continuous Drain Current3 4.6 A Parameter Rating Drain-Source Voltage 20 Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, ultra low on-resistance and cost-effectiveness. D2 S2 TSSOP-8 Rev.2.10 1/29/2005 RoHS compliant.

www.SiliconStandard.com 2 of 6 SSM9926GEO Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage V GS=0V, ID=250uA 20 - - V Δ BV DSS/ Δ Tj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA - 0.1 - V/°C RDS(ON) Static Drain-Source On-Resistance VGS=4.5V, ID=4A - - 28 mΩ VGS=2.5V, ID=2A - - 40 mΩ VGS(th) Gate Threshold Voltage V DS=VGS, ID=250uA 0.5 - - V gfs Forward Transconductance V DS=10V, ID=4.6A - 9.7 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=20V, VGS=0V - - 1 uA Drain-Source Leakage Current (Tj=70oC) VDS=20V ,VGS=0V - - 25 uA IGSS Gate-Source Leakage V GS= ± 10 V - - ± 10 uA Qg Total Gate Charge2 ID=4.6A - 12.5 - nC Qgs Gate-Source Charge V DS=20V - 1 - nC Qgd Gate-Drain ("Miller") Charge V GS=5V - 6.5 - nC td(on) Turn-on Delay Time2 VDS=10V - 5 - ns tr Rise Time I D=1A - 9 - ns td(off) Turn-off Delay Time RG=3.3Ω ,VGS=5V - 26.2 - ns tf Fall Time RD=10Ω - 6.8 - ns Ciss Input Capacitance V GS=0V - 355 - pF Coss Output Capacitance V DS=20V - 190 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 85 - pF Source-Drain Diode Symbol Parameter Test Conditions Min. Typ. Max. Units IS Continuous Source Current ( Body Diode ) VD=VG=0V,VS=1.2V - - 1.25 A ISM Pulsed Source Current ( Body Diode )1 -- 2 0 A VSD Forward On Voltage2 Tj=25°C,IS=1.25A,VGS=0V - - 1.2 V Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10 sec. Rev.2.10 1/29/2005

www.SiliconStandard.com 3 of 6 SSM9926GEO Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 123456 V GS (V) RDS(ON) (m ΩΩΩΩ) T C =25 o C I D = 4A 0 0.5 1 1.5 2 2.5 V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) T C =25 o C V GS =2.0V 4.5V 4.0V 3.5V 3.0V 2.5V 0 0.5 1 1.5 2 2.5 V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) T C =150 o C V GS =2.0V 4.5V 4.0V 3.5V 3.0V 2.5V 0.6 0.8 1.0 1.2 1.4 1.6 1.8 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized RDS(ON) V GS =4.5V I D = 4A Rev.2.10 1/29/2005

www.SiliconStandard.com 4 of 6 SSM9926GEO Fig 5. Maximum Drain Current v.s. Fig 6. Typical Power Dissipation Case Temperature Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance 0.01 0.1 100 0.1 1 10 100 V DS (V) ID (A) T C =25 o C Single Pulse 1ms 10ms 100ms 0.01 0.1 0.0001 0.001 0.01 0.1 1 10 100 t , Pulse Width (s) Normalized Thermal Response (R thja) PDM Duty Factor = t/T Peak Tj = PDM x Rthja + Ta t T 0.02 0.05 0.1 0.2 Duty Factor=0.5 Single Pulse 0.2 0.4 0.6 0.8 1.2 0 50 100 150 T c , Case Temperature ( o C) PD (W) 25 50 75 100 125 150 T c , Case Temperature ( o C) ID , Drain Current (A) Rev.2.10 1/29/2005

www.SiliconStandard.com 5 of 6 SSM9926GEO Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics Fig 11. Forward Characteristic of Fig 12. Gate Threshold Voltage vs. Reverse Diode Junction Temperature 0 5 10 15 20 25 Q G , Total Gate Charge (nC) VGS , Gate to Source Voltage (V) V DS =10V V DS =15V VDS =20V I D =4.6A 100 1000 1 5 9 1 31 72 12 52 9 V DS (V) C (pF) f=1.0MHz Ciss Coss Crss 0.01 0.1 100 0 0.4 0.8 1.2 1.6 V SD (V) IS (A) T j =25 o CT j =150 o C 0.2 0.4 0.6 0.8 1.2 1.4 1.6 -50 0 50 100 150 Junction Temperature ( o C ) VGS(th) (V) Rev.2.10 1/29/2005

www.SiliconStandard.com 6 of 6 Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expre ss or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. SSM9926GEO Fig 13. Switching Time Circuit Fig 14. Switching Time Waveform Fig 15. Gate Charge Circuit Fig 16. Gate Charge Waveform td(on) tr td(off) tf VDS VGS 10% 90% Q VG QGS QGD QG Charge 0.5 x RATED VDS TO THE OSCILLOSCOPE 5 v D G S VDS VGS RG RD RATED VDS TO THE OSCILLOSCOPE D G S VDS VGS IDIG 1~ 3 mA Rev.2.10 1/29/2005