SSM9685M SSC | Alldatasheet
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www.SiliconStandard.com 1 of 5 N-CHANNEL ENHANCEMENT-MODE POWER MOSFET Simple drive requirement BV DSS 80V Lower gate charge R DS(ON) 45mΩ Fast switching characteristics ID 5.3A
Description
ID @ TA=25°C ID @ TA=100°C IDM A PD @ TA=25°C W/°C TSTG TJ Symbol Value Unit Rthj-a Thermal Resistance Junction-ambient3 Max. 50 °C/W Rating 5.3 A Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current3 3.4 A Pulsed Drain Current1 50 2.5 W -55 to 150 °C Operating Junction Temperature Range -55 to 150 °C Linear Derating Factor 0.02 Storage Temperature Range Thermal Data Parameter Total Power Dissipation ± 20 Advanced Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SSM9685M is in the SO-8 package, which is widely preferred for commercial and industrial surface-mount applications, and is well suited for low-voltage applications such as DC/DC converters. G D S S S S G D D D D SO-8 SSM9685M 8/21/2004 Rev.2.01
www.SiliconStandard.com 2 of 5 SSM9685M 8/21/2004 Rev.2.01 Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage VGS=0V, ID=1mA 80 - - V Δ BVDSS/ ΔTj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA - 0.073 - V/°C RDS(ON) Static Drain-Source On-Resistance2 VGS=10V, ID=5.3A - - 45 mΩ VGS=4.5V, ID=3.0A - - 50 mΩ VGS(th) Gate Threshold Voltage VDS=VGS, ID=250uA 1 - 3 V gfs Forward Transconductance VDS=10V, ID=5A - 9 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=80V, VGS=0V - - 1 uA Drain-Source Leakage Current (Tj=70oC) VDS=64V, VGS=0V - - 25 uA IGSS Gate-Source Leakage VGS=- - nA Qg Total Gate Charge2 ID=5A - 19 30 nC Qgs Gate-Source Charge VDS=64V - 5 - nC Qgd Gate-Drain ("Miller") Charge VGS=4.5V - 10 - nC td(on) Turn-on Delay Time2 VDS=40V - 11 - ns tr Rise Time I D=1A - 6 - ns td(off) Turn-off Delay Time R G=3.3Ω ,VGS=10V - 36 - ns tf Fall Time R D=40Ω -2 2- ns Ciss Input Capacitance VGS=0V - 1710 2730 pF Coss Output Capacitance VDS=25V - 135 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 98 - pF Source-Drain Diode Symbol Parameter Test Conditions Min. Typ. Max. Units VSD Forward On Voltage2 IS=2A, VGS=0V - - 1.2 V trr Reverse Recovery Time IS=5A, VGS=0V, - 42 - ns Qrr Reverse Recovery Charge dI/dt=100A/µs - 84 - nC Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 125°C/W when mounted on min. copper pad. ± 20V ±100
www.SiliconStandard.com 3 of 5 SSM9685M 8/21/2004 Rev.2.01 Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature Fig 5. Forward Characteristic of Fig 6. Gate Threshold Voltage vs. Reverse Diode Junction Temperature V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) T A =25 o C 10V 6.0V 5.0V 4.5V V G =3.0V 02468 1 0 V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) T A =150 o C V G = 3.0 V 10V 6.0V 5.0V 4.5V V SD , Source-to-Drain Voltage (V) IS(A) T j =25 o CT j =150 o C 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized RDS(ON) I D =5.3A V G =10V 0.5 1.5 2.5 -50 0 50 100 150 T j , Junction Temperature ( o C) VGS(th) (V) 35.00 37.50 40.00 42.50 45.00 47.50 2468 1 0 1 2 V GS , Gate-to-Source Voltage (V) RDS(ON) (mΩ ) I D =5A T A =25°C
www.SiliconStandard.com 4 of 5 SSM9685M 8/21/2004 Rev.2.01 Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform td(on) tr td(off)tf VDS VGS 10% 90% Q VG 4.5V QGS QGD QG Charge 100 1000 10000 1 5 9 13 17 21 25 29 V DS , Drain-to-Source Voltage (V) C (pF) f=1.0MHz C iss C oss C rss 0 1 02 03 04 05 0 Q G , Total Gate Charge (nC) VGS , Gate to Source Voltage (V) V DS =4 0V V DS =5 0V V DS =6 4V I D =5A 0.001 0.01 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 t , Pulse Width (s) Normalized Thermal Response (R thja) PDM Duty factor = t/T Peak Tj = PDM x Rthja + Ta Rthja = 125℃/W t T 0.02 0.01 0.05 0.1 0.2 Duty factor=0.5 Single Pulse 0.01 0.1 100 0.1 1 10 100 1000 V DS , Drain-to-Source Voltage (V) ID (A) T A =25 o C Single Pulse 100us 1ms 10ms 100ms DC
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