SSM9585GM SSC | Alldatasheet
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Technical content
www.SiliconStandard.com 1 of 5 P-channel Enhancement-mode Power MOSFET Simple drive requirement BVDSS -80V Lower gate charge RDS(ON) 180mΩ Fast switching characteristics I D -2.7A
DESCRIPTION
Advanced Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SSM9585GM is in the SO-8 package, which is widely preferred for commercial and industrial surface mount applications. This device is suitable for low voltage applications such as DC/DC converters. S S S G D D D D SO-8 Pb-free; RoHS compliant. G D S 3/21/2005 Rev.2.01 Symbol Units VDS V VGS V ID @ TA=25°C ID @ TA=70°C IDM A PD @ TA=25°C W/°C TSTG TJ Symbol Value Unit RΘj-a Maximum Thermal Resistance Junction-ambient 3 50 °C/W Parameter Total Power Dissipation 2.5 W -55 to 150 °C Operating Junction Temperature Range -55 to 150 °C Linear Derating Factor 0.02 Storage Temperature Range Continuous Drain Current3 -2.1 A Pulsed Drain Current1 -20 Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Rating -80 ±25 -2.7 A SSM9585GM THERMAL DATA
www.SiliconStandard.com 2 of 5 3/21/2005 Rev.2.01 ELECTRICAL CHARACTERISTICS (at Tj = 25°C, unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage V GS=0V, ID=-250uA -80 - - V Δ BVDSS/ ΔTj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA - -0.07 - V/°C RDS(ON) Static Drain-Source On-Resistance2 VGS=-10V, ID=-2.7A - - 180 mΩ VGS=-4.5V, ID=-2.5A - - 200 mΩ VGS(th) Gate Threshold Voltage VDS=VGS, ID=-250uA -1 - -3 V gfs Forward Transconductance VDS=-10V, ID=-2.7A - 5 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=-80V, VGS=0V - - -1 uA Drain-Source Leakage Current (Tj=70oC) VDS=-64V, VGS=0V - - -25 uA IGSS Gate-Source Leakage VGS=±25V - - nA Qg Total Gate Charge2 ID=-2.7A - 18 28 nC Qgs Gate-Source Charge VDS=-64V - 5 - nC Qgd Gate-Drain ("Miller") Charge V GS=-4.5V - 7 - nC td(on) Turn-on Delay Time2 VDS=-40V - 10 - ns tr Rise Time ID=-1A - 6 - ns td(off) Turn-off Delay Time RG=3.3Ω , VGS=-10V - 67 - ns tf Fall Time RD=40Ω 30 - ns Ciss Input Capacitance VGS=0V - 1790 2860 pF Coss Output Capacitance VDS=-25V - 140 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 98 - pF Symbol Parameter Test Conditions Min. Typ. Max. Units VSD Forward On Voltage2 IS=-2A, VGS=0V - - -1.2 V trr Reverse Recovery Time2 IS=-2.7A, VGS=0V, - 80 - ns Qrr Reverse Recovery Charge dI/dt=100A/µs - 320 - nC Notes: 1.Pulse width limited by maximum junction temperature. 2.Pulse width <300us, duty cycle <2%. 3.Surface-mounted on 1 in2 copper pad on FR4 board; 125°C/W when mounted on minimum copper pad. ±100 SSM9585GM SOURCE-DRAIN DIODE
www.SiliconStandard.com 3 of 5 3/21/2005 Rev.2.01 Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature Fig 5. Forward Characteristic of Fig 6. Gate Threshold Voltage vs. Reverse Diode Junction Temperature -V SD , Source-to-Drain Voltage (V) -IS(A) T j =25 o CT j =150 o C 048 1 2 1 6 2 0 -V DS , Drain-to-Source Voltage (V) -ID , Drain Current (A) T A =2 5o C -10V -6.0V -5.0V -4.5V V G = -3.0 V 125 130 135 140 145 150 3456789 1 0 1 1 -V GS , Gate-to-Source Voltage (V) RDS(ON) (mΩ ) I D = -2.5 A T A =25°C 0 2 4 6 8 10 12 14 -V DS , Drain-to-Source Voltage (V) -ID , Drain Current (A) -10V -6.0V -5.0V -4.5V V G = -3.0 V T A =150 o C 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized RDS(ON) I D = -2.7 A V G =-10V 0.5 1.5 2.5 -50 0 50 100 150 T j , Junction Temperature ( o C) -VGS(th) (V) SSM9585GM
www.SiliconStandard.com 4 of 5 3/21/2005 Rev.2.01 Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform td(on) tr td(off)tf VDS VGS 10% 90% Q VG -4.5V QGS QGD QG Charge 01 0 2 0 3 0 4 0 Q G , Total Gate Charge (nC) -VGS , Gate to Source Voltage (V) I D = -2.7A V DS = -64V 100 1000 10000 1 5 9 1 31 72 12 52 9 -V DS , Drain-to-Source Voltage (V) C (pF) f=1.0MHz C iss C oss C rss 0.01 0.1 100 0.1 1 10 100 1000 -V DS , Drain-to-Source Voltage (V) -ID (A) T A =25 o C Single Pulse 1ms 10ms 100ms DC 0.001 0.01 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 t , Pulse Width (s) Normalized Thermal Response (R thja) PDM Duty factor = t/T Peak Tj = PDM x Rthja + Ta Rthja=125°C/W t T 0.02 0.01 0.05 0.1 0.2 Duty factor=0.5 Single Pulse SSM9585GM
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expre ss or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. www.SiliconStandard.com 5 of 53/21/2005 Rev.2.01 SSM9585GM