SSM7002DGU

SSM7002DGU SSC | Alldatasheet

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www.SiliconStandard.com 1 of 5 Dual N-channel Enhancement-mode Power MOSFETs BVDSS 50V RDS(ON) 3Ω ID 250mA The SSM7002DG acheives fast switching performance with low gate charge without a complex drive circuit. It is suitable for low voltage applications such as DC/DC ABSOLUTE MAXIMUM RATINGS VDS VGS ID IDM PD TSTG TJ Symbol Parameter Value Units RΘJA Maximum thermal resistance, junction-ambient 625 °C/W Symbol Parameter Value Units Drain-source voltage 50 V Gate-source voltage Continuous drain current 3, TA = 25°C 250 mA Pulsed drain current 1,2 1.0 A Operating junction temperature range -55 to 150 °C TA = 75°C 120 mW Storage temperature range Total power dissipation 3, TA = 25°C 200 mW -55 to 150 °C THERMAL CHARACTERISTICS ± 20 V Pb-free; RoHS-compliant SOT-363 D2 G1 S1 SOT-363 PRODUCT SUMMARY DESCRIPTION SSM7002DGU 11/26/2005 Rev.3.01 Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C. 2.Pulse width <300us, duty cycle <2%. 3.Mounted on FR4 board converters and general load-switching circuits. The SSM7002DGU is supplied in a RoHS-compliant SOT-363 package, which is widely used where board space is critical and a small footprint is required. ISD Source-drain diode current 115 mA

www.SiliconStandard.com 2 of 5 SSM7002DGU 11/26/2005 Rev.3.01 ELECTRICAL CHARACTERISTICS (at Tj = 25°C, unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-source breakdown voltage V GS=0V, ID=10uA 5 0 - - V ID(ON) On-state drain current VDS= 7V, VGS=10V 500 - - mA RDS(ON) Static drain-source on-resistance V GS=10V, ID =250mA - - 3 Ω VGS=5V, ID =50mA - - 4 Ω VGS(th) Gate threshold voltage VDS=VGS, ID=250uA 1 - 2.5 V gfs Forward transconductance V DS=7V, ID=200mA 80 - - mS IDSS Drain-source leakage current VDS=50V, VGS=0V - - 1.0 uA IGSS Gate-source leakage current VGS=±20V - - ±100 nA td(on) Turn-on delay time 2 VDS=30V - 7.5 20 ns tr Rise time ID=100mA - 6 - ns td(off) Turn-off delay time R G=10Ω , V GEN=10V - 7.5 20 ns tf Fall time -3- ns Ciss Input capacitance VGS=0V - 19 50 pF Coss Output capacitance VDS=25V - 10 25 pF Crss Reverse transfer capacitance f=1.0MHz - 3 5 pF Source-Drain Diode Symbol Parameter Test Conditions Min. Typ. Max. Units VSD Forward voltage 2 IS=115mA, VGS=0V - 0.76 1.5 V Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C. 2.Pulse width <300us, duty cycle <2%.

www.SiliconStandard.com 3 of 5 SSM7002DGU 11/26/2005 Rev.3.01 Fig 1. Typical output characteristics Fig 2. Typical transfer characteristics Fig 3. Typical Capacitance Fig 4. Normalized on-resistance vs. junction temperature Fig 5. Forward characteristics of Fig 6. Gate threshold voltage vs. the reverse diode junction temperature Drain Current (A) Drain to source voltage (V) Gate to source voltage (V) Drain Current (A) Drain to source voltage (V) Capacitance (pF) Drain current (A) Drain to source resistance (Ω )) Body diode forward voltage (V) Source-drain Current (A) Junction temperature (°C) Gate –source threshold voltage (V)

www.SiliconStandard.com 4 of 5 SSM7002DGU 11/26/2005 Rev.3.01 Fig 7. Gate charge characteristics Fig 8. Typical transconductance Fig 9. Maximum safe operating area Fig 10. Normalized Transient Thermal Impedance Total gate charge (nC) Gate –source voltage (V) Drain to source current (A) Transconductance (S) Drain-source voltage (V) Drain Current (A) Square wave pulse duration (S) Transient thermal impedance r(t)

Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expre ss or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. www.SiliconStandard.com 5 of 5 SSM7002DGU 11/26/2005 Rev.3.01 PHYSICAL DIMENSIONS SOT-363 SOT-363 DIMENSION MILLIMETERS INCHES DIM MIN MAX MIN MAX A 0.80 1.10 0.031 0.043 bp 0.10 0.30 0.004 0.012 C 0.10 0.25 0.004 0.010 D 1.80 2.20 0.071 0.087 E 1.15 1.35 0.045 0.053 e 1.30 (t yp) 0.052 (t yp) e1 0.65 (t yp) 0.026(t yp) He 2.00 2.20 0.079 0.087 Lp 0.10 0.3 0.004 0.012 Q 0.20 (t yp) 0.008 (t yp) W 0.20 (t yp) 0.008 (t yp) Θ 10o (typ) 10 o (typ) PHYSICAL DIMENSIONS PACKING: Moisture sensitivity level MSL3 3000 pcs in antistatic tape on a reel packed in a moisture barrier bag (MBB).