SSM6679M

SSM6679M SSC | Alldatasheet

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Technical content

www.SiliconStandard.com 1 of 4 SSM6679M Rev.2.02 4/06/2004 P-CHANNEL ENHANCEMENT-MODE POWER MOSFET Simple drive requirement BVDSS -30V Low on-resistance RDS(ON) 9mΩ Fast switching characteristics ID -14A

Description

ID @ TA=25°C ID @ TA=100°C IDM A PD @ TA=25°C W/°C TSTG TJ Symbol Value Unit Rthj-a Thermal Resistance Junction-ambient3 Max. 50 °C/W Rating -30 -14 A Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current3 -8.9 A Pulsed Drain Current1 -50 2.5 W -55 to 150 °C Operating Junction Temperature Range -55 to 150 °C Linear Derating Factor 0.02 Storage Temperature Range Thermal Data Parameter Total Power Dissipation ± 25 Advanced power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SO-8 package is widely preferred for commercial and industrial surface-mount applications and is well suited for low voltage applications such as DC/DC converters. S S S G D D D D SO-8 G D S

www.SiliconStandard.com 2 of 4 SSM6679M Rev.2.02 4/06/2004 Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage V GS=0V, ID=-250uA -30 - - V Δ BVDSS/Δ Tj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA - -0.03 - V/°C RDS(ON) Static Drain-Source On-Resistance2 VGS=-10V, ID=-14A - - 9 mΩ VGS=-4.5V, ID=-11A - - 13 mΩ VGS(th) Gate Threshold Voltage V DS=VGS, ID=-250uA -1 - -3 V gfs Forward Transconductance V DS=-10V, ID=-14A - 26 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=-30V, VGS=0V - - -1 uA Drain-Source Leakage Current (Tj=70oC) VDS=-24V, VGS=0V - - -25 uA IGSS Gate-Source Leakage V GS=- - nA Qg Total Gate Charge2 ID=-14A - 37 60 nC Qgs Gate-Source Charge V DS=-24V - 3 - nC Qgd Gate-Drain ("Miller") Charge V GS=-4.5V - 25 - nC td(on) Turn-on Delay Time2 VDS=-15V - 13 - ns tr Rise Time I D=-1A - 11 - ns td(off) Turn-off Delay Time RG=3.3Ω ,VGS=-10V - 58 - ns tf Fall Time RD=15Ω -4 3- ns Ciss Input Capacitance V GS=0V - 2860 4580 pF Coss Output Capacitance V DS=-25V - 950 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 640 - pF Source-Drain Diode Symbol Parameter Test Conditions Min. Typ. Max. Units VSD Forward On Voltage2 IS=-2A, VGS=0V - - -1.2 V trr Reverse Recovery Time2 IS=-14A, VGS=0V, - 48 - ns Qrr Reverse Recovery Charge dI/dt=100A/µs - 46 - nC Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 125 °C/W when mounted on Min. copper pad. ± 25V ±100

www.SiliconStandard.com 3 of 4 SSM6679M Rev.2.02 4/06/2004 Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature Fig 5. Forward Characteristic of Fig 6. Gate Threshold Voltage vs. Reverse Diode Junction Temperature 120 160 200 240 280 012345 -V DS , Drain-to-Source Voltage (V) -ID , Drain Current (A) T A =2 5o C -10V -7.0V -5.0V -4.5V V G = -3.0 V 100 150 0123456 -V DS , Drain-to-Source Voltage (V) -ID , Drain Current (A) -10V -7.0V -5.0V -4.5V V G = -3.0 V T A = 150o C 3579 1 1 -V GS , Gate-to-Source Voltage (V) RDS(ON) (mΩ) I D = -11 A T A =25 ℃℃℃℃ 0.6 0.8 1.0 1.2 1.4 1.6 1.8 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized RDS(ON) I D = -14 A V G =-10V -50 0 50 100 150 T j , Junction Temperature ( o C) -VGS(th) (V) -V SD , Source-to-Drain Voltage (V) -IS(A) T j =25 o CT j =150 o C

Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expre ss or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. www.SiliconStandard.com 4 of 4 SSM6679M Rev.2.02 4/06/2004 100 1000 10000 1 5 9 13 17 21 25 29 -V DS , Drain-to-Source Voltage (V) C (pF) f=1.0MHz Ciss Coss Crss 02 0 4 0 6 0 8 0 Q G , Total Gate Charge (nC) -VGS , Gate to Source Voltage (V) I D = - 14 A V DS = -24V Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 0.01 0.1 100 0.1 1 10 100 -V DS , Drain-to-Source Voltage (V) -ID (A) 1ms 10ms 100ms DC T A =25 o C Single Pulse 0.001 0.01 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 t , Pulse Width (s) Normalized Thermal Response (R thja) PDM Duty factor = t/T Peak Tj = PDM x Rthja + Ta Rthja=125oC/W t T 0.02 0.01 0.05 0.1 0.2 Duty factor=0.5 Single Pulse Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance td(on) tr td(off)tf VDS VGS 10% 90% Q VG -4.5V QGS QGD QG Charge Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform